CPLD SPI BUS

[Andre]

Hi

CPLD's combined with the 6502 are definitely the way to go. I'm using the (obsolete) MAX7000 series, but they are compatible with the Microchip ATF15xx series which are still available. I use Quartus II 13.0.1 for schematics, compiling and programming of the MAX 7000 series, but I found the latest version of Quartus II better for simulation. Simulate small chunks of your design and then combine them in a final schematic for testing on hardware.

I've started work on a SPI to SD card interface. This is my progress so far.

The current hardware supports

1. MSB first
2. selectable clock frequency
3. polling for TX complete
4. SPI MODE 0

There is still plenty of space in the CPLD for more features.

I have included some information

1. the plug-in card with the CPLD and SD card
2. the CPLD schematic
3. Logic analyzer trace with SD card CMD0 command / response

Here is some C code that I have been testing with,

Code: Select all

unsigned char SPI_Write_Byte(unsigned char b)
{
	unsigned char temp;
	
	POKE(0xDEA1,b);			// load SPI data byte
	POKE(0xDEA2,0);			// generate SPI write pulse, data byte is don't care
	
	do
	{
		temp = PEEK(0xDEA0);
	}while((temp & 0x08) == 0x00);    // polling for TX complete
	
	return(PEEK(0xDEA1));	// read data received on MISO
}

Code: Select all

unsigned char SD_Send_CMD0(void)
{
	unsigned char res;	
	unsigned char SD_Cmd[MMC_CMD_SIZE];
	char WrkSpc[40];
	
	ACIA_Print("CMD0",WITH_CRLF);
	
	SD_Cmd[0] = 0x40;					// CMD0
	SD_Cmd[1] = 0x00;
	SD_Cmd[2] = 0x00;
	SD_Cmd[3] = 0x00;
	SD_Cmd[4] = 0x00;
	SD_Cmd[5] = get_CRC(SD_Cmd,5);		// 0x95
	
	POKE(0xDEA0,0x14);	// select SPI CS0 and clock speed 
	SPI_Write_Buffer(SD_Cmd, MMC_CMD_SIZE );

	res = SD_Read_Res1();
	POKE(0xDEA0,0x00);	// de-select SPI CS
	
	utoa(res,WrkSpc,16);
	ACIA_Print(WrkSpc,WITH_CRLF);
	
	return(res);
}

Reading and writing is as fast as the 6502 can access memory.
I need to increase the CPLD clock. It is currently 10MHz, but I lost speed due to to the arrangement of logic to drive the SPI clock and MOSI shift register.

If anybody has any input or want more information please feel free to ask.

Regards
Andre

[Andre]

Hi again,

I've been working my way through SD card initialization.

I found this tutorial from RJH coding very useful. (http://www.rjhcoding.com/index.php)

Also this post https://electronics.stackexchange.com/q ... g-response
referring to a incorrect response to CMD8 which is what I ran into.
The post recommends adding additional dummy writes.
I added a SD_Card_Dummy_Clock function that generates 2 SPI writes resulting in 16 additional clock pulses before the command starts.

Code: Select all

void SD_Send_CMD8(void)
{
	unsigned char SD_Cmd[MMC_CMD_SIZE];
	
	SD_Card_Dummy_Clock();
	ACIA_Print("CMD8",WITH_CRLF);

	SD_Cmd[0] = 0x48;
	SD_Cmd[1] = 0x00;
	SD_Cmd[2] = 0x00;
	SD_Cmd[3] = 0x01;
	SD_Cmd[4] = 0xAA;
	POKE(0xDEA0,0x14);	// select SPI CS0 and clock speed
	SD_Cmd[5] = get_CRC(SD_Cmd,5);   // SD_Cmd[5] = 0x87;
	SPI_Write_Buffer(SD_Cmd, MMC_CMD_SIZE );
	SD_readRes7();
	POKE(0xDEA0,0x04);	// de-select SPI CS	
}

The tutorial shows the interpretation of SD card command responses which I have copied.
This is where I am now.

SD CARD INIT
RETURN 0x01
CMD0
In Idle State
CMD8
In Idle State
Command Version: 0
Voltage Accepted: 2.7-3.6V
Echo: 0
CMD55
In Idle State
ACMD41
In Idle State
CMD55
In Idle State
ACMD41
Card Ready
CMD58
Card Ready
Card Power Up Status: READY
CCS Status: 1
VDD Window: 2.7-2.8,
2.8-2.9,
2.9-3.0,
3.0-3.1,
3.1-3.2,
3.2-3.3,
3.3-3.4,
3.4-3.5,
3.5-3.6

The card is ready for use.

The CPLD SPI interface is holding up so far.

Regards
Andre

[Proxy]

Daryl has already made a pretty advanced SPI controller for the ATF1504 called "65SPI": https://sbc.rictor.org/65spi2.html
have you tried it out or even heard of it before making your own controller?

also i'm currently trying to port FatFS to cc65 to use it with an SD Card, but i haven't gotten around to building the actual hardware interface yet.
you could try it yourself as well if you want to, running a file system should be a pretty good test to see if the interface is fully functional.
http://elm-chan.org/fsw/ff/00index_e.html

[Andre]

Hi Proxy,

I read some of the 65SPI posts here viewtopic.php?f=4&t=1265&hilit=SPI+INTERFACE but did not realize that there was a website with more information.
I will take a closer look. Thanks

Yes, I am looking at FatFS.
What have you done so far?

I'm not sure how far I want to take a file system and how one might use it.
For example, do I want to write a word processor / text editor for my board and have it save bytes to files on a SD card...probably not.
Do I want to copy files from a PC to an SD card and load/run them...yes

Also, I only have 8kbytes of boot ROM(ROM=FLASH memory).(6502 upper 8k)
The file system (FatFS) must be located in ROM, in 8kbyte blocks of banked memory, lower down in memory.
I have 8k blocks banked to a total of 512k RAM + 512K ROM

Regards
Andre

[Proxy]

I haven't done that much, i just modified one of the example diskio.c files (specifically the avr bit banged SPI one) to make use of 65SPI instead.
i then compiled it with a blank _main function to get a rough idea of the total size.
the config options are as follows:
everything is set to 0 or the default non boolean value, except:
FF_USE_CHMOD 1
FF_USE_LABEL 1
FF_CODE_PAGE 437
FF_VOLUMES 1

the total binary output size is around ~24.5kB with this.
disabling CHMOD and LABEL gets it down to ~23kB.
setting FF_FS_MINIMIZE to 3 (meaning you can only read/write/create files in the root directory and pretty much nothing else) gets the size down to ~17.6kB.

most of this size comes from the CODE segment in the ff.c file, so optimizing it to make more use of assembly functions should help in further decreasing the size, but i don't have the time for that right now.

anyways. here the zip file that contains the FatFS files i've been working with, i used "0_C1.bat" to compile/assemble/link everything, so you obviously need to adjust the linker command to work with your hardware config.
and you also need to modify the 65diskio.c file to work with your SPI Controller (specifically: delayus, readSD, writeSD, select, and deselect)

[okwatts]

You might be interested in looking at the site of user dourish (https://www.dourish.com/projects/mite.html) who, although he has bitbanged SPI, is looking at using 65SPI to improve over the bitbanging. His software is in 65c02 assembler but is intended to support his forth version. He reads FAT16 sd card but this is hard-coded for a particular format. It could be generalized or adapted for your specific FAT layout for formatting. I have looked at this and have implemented this on Richard Cini's SBC2.7 which is close to the hardware of his homebuilt computer.

[Proxy]

there is also the FAT32 code from the Commander x16, which was written to be easily portable to other systems.
you obviously need to supply some custom IO functions to interface with the SD Card, if you want to use this with C you need to write small C wrappers so that the functions work correctly.
but the program size should be much smaller.

https://github.com/commanderx16/x16-rom ... /dos/fat32

i'll try and see if i can make a portable C library out of it myself when i got the time.

[Sheep64]

Proxy on Mon 28 Feb 2022 wrote:

Daryl has already made a pretty advanced SPI controller for the ATF1504 called "65SPI": https://sbc.rictor.org/65spi2.html
have you tried it out or even heard of it before making your own controller?

Some exercises are worth repeating because they are educational. In order of decreasing importance (and approximate decreasing difficulty):

• Make your own 8 bit computer.
• Make your own video interface.
• Make your own SPI.
• Make your own EEPROM programmer.
• Make your own UART.
• Make your own keyboard.