I googled for a solution for this problem, and the best I can come up with is this circuit.
For the reset pin of an SC28L92 DUART, I need an active high reset signal. I’m trying to save a CPLD pin by inverting my existing RESB pin, which is active low, to an active high signal RES, by using a PNP transistor. I chose the PNP transistor because it uses no current when reset is not activated.
• RESB is coming from a 5V Xilinx 9500 CPLD
• RES is going to an SC28L92 DUART
However, is this circuit correct, what resister values should I use? Or should I use an inverter 74HC(T)04?
That would not be a good way to do it for any fast signals, because of the RC time constants (the resistors times the base capacitance and the load capacitance), and because there's no provision to keep the transistor from saturating and taking longer to come out of saturation; but it may not matter for a reset signal. If you do need to speed it up, at least put a 47pF capacitor across the base resistor, and a fast Schottky diode from the collector to the base, with the cathode toward the base. The diode will keep the collector from getting much less than about .3 or .4V from the emitter, because if it did, it would swamp out the bias. The diode keeps the transistor from saturating, so it can be turned off faster when it's time. This is what the Schottky is for in 74S, 74LS ("S" being for "Schottky"), for speed, and it's also why the specs don't show the output being guaranteed to go below .4V with NPN's bing used to pull the outputs to ground.
As for resistors: Is the load CMOS, so you don't have to pull down hard like you would with TTL (or even LSTTL)? If that's the case, you could go with something like a 4.7K collector resistor, which would give a max of just under 1mA (5V/5K), and then dividing the 1mA by 50 for the minimum gain of the transistor (I'm guessing—I didn't look it up), to get a base current of 20uA, you'd need about (5V-.65V-.1V)/20uA=212K (the "-.65V" is for the VBE, and the "-.1V" is a guess as to how low the driver will pull); but that load is so light it doesn't hurt to cut the resistance for some added margin, like to 47K.
I've done this kind of thing for a slowish synchronous-serial link (100kbps?) from a 65c22 that I stepped up to 12V, and it worked fine; but for what you want, I'd just use a 74HC(T)04.
Since there is enough room on the board, and to make it more reliable, I’ll go for the 74HCT04. I have it lying around and the board isn’t made yet. Thanks for your advice!
Or maybe use something like a TL7705ACP for your reset controller. As they supply both active low and active high reset signals, in an 8 pin package.
Indeed, I didn't build a permanent CLOCK and RESET circuit yet, and I do have a MAX1232 here at home. The downside of that MAX1232 is that it needs a watchdog signal, at least every second. I don't want to depend on generating that signal per software, and PHI2 is probably too fast for that purpose.
If space is really at a premium and if you're using SMT, you could use something like the 74LVC1G04 single-gate IC in a SOT-23 package. (The index to 74LVC1G parts is here. You might have to click "load more" at the bottom a few times to get all of them to show. 74LVC is very fast, and most of them can handle up to 5.5V power supply and logic.
Another possibility of course is that you have a spare section of a quad NOR or NAND or similar IC that you could use for the purpose.
Thanks for all the suggestions. For now I’ll settle for an ATtiny2313A to provide the CLOCK and both complementary RESET signals and de-bounce he reset button. This gets the job done quick and dirty.
However, at some point I might combine CPU, RAM, EEPROM, CPLD, DUART, RESET and CLOCK generator onto one board, and get it made by a Chinese PCB manufacturer. Then I’ll probably use a can oscillator and some kind of reset chip to provide those functions.
