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6502 wide stack
Posted: Wed Nov 29, 2017 12:54 pm
by valerio63
Hello
I put a my old VHDL project of a wide (16 bit) stack 6502 CPU, also I added some useful opcodes for fast contest switch, zero page relocation etc.
The CPU has binary/decimal ALU for full compatibility, I tested this CPU on several projects (on Altera Cyclone IV) as intelligent I/O coprocessor for industrial automation projects for my company.
The clock cycles needed for opcodes are almost identical to original 6502 project, some opcode need less clock cycle than original CPU.
Best Regards
Valerio Venturi
Italy
Re: 6502 wide stack
Posted: Wed Nov 29, 2017 3:38 pm
by Dr Jefyll
Welcome, Valerio
This is a nice selection of improvements. For example the exchange instructions appeal to me -- something so simple, but so worthwhile. It's almost like having new address modes. For example, if you want (ind),X mode then just use XYZ -- ie; exchange X with Y -- and follow up by using (ind),Y mode.
Maybe you can tell us more about that I/O coprocessor, please.
-- Jeff
Code: Select all
; new V6502 opcodes macros
phr: .macro ;AXY->SP: push A,X,Y to stack (useful for fast context switch)
.byte $8b
.endm
plr: .macro ;SP->YXA: pull A,X,Y from stack (useful for fast context switch)
.byte $ab
.endm
taz: .macro ;A->Z: copy A to zero page register (MSB base address)
.byte $1b
.endm
tza: .macro ;Z->A: copy zero page register to A
.byte $3b
.endm
txy: .macro ;X->Y: copy X to Y
.byte $9b
.endm
tyx: .macro ;Y->X: copy Y to X
.byte $bb
.endm
xyx: .macro ;X<->Y: exchange X with Y
.byte $eb
.endm
xax: .macro ;A<->X: exchange A with X
.byte $0b
.endm
xay: .macro ;A<->Y: exchange A with Y
.byte $2b
.endm
isp: .macro ;X -> S (lsb); A -> S msb: copy X and A to S (16 bit stack pointer)
.byte $4b
.endm
tsp: .macro ;S lsb -> X; S msb -> A: copy S to X and A
.byte $5b
.endm
jsrx: .macro arg1 ;JSR ($XXXX,X) jump vector table indexed by X
.byte $fc
.word arg1
.endm
Re: 6502 wide stack
Posted: Mon Dec 04, 2017 10:55 am
by valerio63
Hello Jeff
I am sorry for delay to answer you but I was very busy, I used the V6502 as I/O coprocessor (or slave CPU) to help main CPU (PowerPC MPC5200) to execute several high speed tasks such intelligent DMA controller, several I2C and SPI interfaces, one CAN bus, incremental encoders, and some discrete I/Os, all of these devices was included in a large FPGA project. Also the ROM and SRAM for the V6502 was included in the FPGA and the main CPU could update "on fly" the software via a simple I2C bus. The main board project was a real time controller for robotic systems.
I choosed the 6502 due to his high deterministic architecture, and also for his speed to execute simple tasks, (the CPU clock was 50 MHZ and the preemptive multitasking interrupt ran at 10 KHZ, 100 microseconds per task).
Today the project is almost obsolete and we moved to a new ARM architecture.
-- Valerio
Re: 6502 wide stack
Posted: Mon Dec 04, 2017 2:56 pm
by barrym95838
Today the project is almost obsolete and we moved to a new ARM architecture.
Thankfully, your robot didn't have an ego, because it would have taken a serious hit.
Mike B.
Re: 6502 wide stack
Posted: Mon Dec 04, 2017 4:43 pm
by valerio63
.....the destiny of everyone (even the robots) is to become obsolete....
Re: 6502 wide stack
Posted: Tue Dec 05, 2017 8:36 am
by valerio63
Hello
i posted an example of multitasking source code for V6502
Re: 6502 wide stack
Posted: Tue Dec 05, 2017 10:19 am
by valerio63
I added a PDF file that shows the improvements of V6502
Re: 6502 wide stack
Posted: Tue Dec 05, 2017 10:31 am
by BigEd
Thanks!
As an aside, this note is interesting:
Unlike 65C02 the RES input cannot be used as additional interrupt request signal...
We did discuss that
here - it seems the early 'C02s did write to stack during reset, but the later 'C02s from WDC do not...
Having RTI pull the Z register could break some existing software, but I see why it's useful. A tradeoff!
Re: 6502 wide stack
Posted: Fri Dec 29, 2017 8:48 pm
by barrym95838
Updated version here:
viewtopic.php?f=10&t=5026
Mike B.