NINA - a homebuilt 6502 machine [video]

[BigEd]

Just came across this: a couple of short videos showing off a "very simple" homebuilt 6502 machine, which apparently took "about a month and bit to design and build, doing a few hours here and there"

(video is a bit dark and shakey, but so are all my photos)


User YT2O95 on YouTube is also user YT2095 on Twitter. I found no blog or website, but we do learn that he previously made a Z80-based machine, and has some collected photos here.

[leeeeee]

It looks like he started with a slightly modified Micro UK101 and added bits.

I wonder how accessing the 6850 is handled, wait cycles?

Lee.

[Dajgoro]

leeeeee wrote:

I wonder how accessing the 6850 is handled, wait cycles?

That could actually be a MC68C50, and maybe it can work at 8MHz (my 1MHz peripherals work at 4).

What kind of mixed technique of building is that? Ww on pin headers?

Edit: I think YT2095 just registered.

[YT2095]

well, I had originally planned on replying here a day or so ago, but I got a bit side-tracked reading some of the other threads here, WOW! what a fantastic site this is! I wish I`d known about this place sooner (or maybe not as I`d probably get very little done).

I`ll do my best to answer the above, although there`s really nothing special that was done on my part to make it work.
the CPU although capable of 10MHz is being run at 8.192MHz, the reason was that when I tried 10MHz the whole thing failed, my bottleneck was the EPROM speed (it was a 150nS type), so I decided to buy a 70nS OTP ROM and use that.
things were much better and for the most part working, but the 6850 was the new bottleneck.
it would Recieve ok and send that data to the CPU, but the TX was flakey at best and would lose signal integrity at about 9.5 MHz.
so I backed it off to 8.192 to be on the safe side, its also a nice freq to use in terms of timing calculations.
the RX TX clk is derived from an entirely different cct using a 9.8304MHz crystal (it divides down nicely for baud rates).

so in effect, I went through all my 6850s at different freq`s to find the best ones and highest freq I could safely get away with, and the CERDIP version (whos number has worn off) was far better than the Plastic devices by 2MHz and 8.192MHz was the winning freq.

as I said at the outset, it`s really rather unimpressive and there was nothing really clever done on my part to make it work, just trial and error using the parts that I had really.

as for the build technique, it`s one that I made up several years ago largely out of necessity, WW boards are really expensive and quite a few of the pins never get used anyway, soldering alone is ok if you can solder anytime anyplace (I don`t many who can), so made a Hybrid, this allows me to use only the pins I`ll need, get all the soldering prep work done when I`m well, and when I`m not so well I can still be making ccts doing WW in bed.
my Wife`s pretty forgiving, but I think she`d draw the line at soldering in bed

[BigEd]

Welcome, YT, and thanks for the "WOW" - thanks also for the clarifications!
Cheers
Ed

[Dajgoro]

On my new cpu board, i got 15ns ram, but the eeprom is still the bottleneck for speed. I use NMOS ic(cheaper) and on my current system i got it to run from the original 1MHz to 4MHz, with all of the components being 1MHz. Since now i kinda have lots of NMOS 6502, i have a CM630P, SY6502, R6502A, UM6502, and an MPS6502. I tested them, and it seems the CM630P and MPS6502 can only get to 2MHz, while the other can get to 4MHz, but they also seem to suck more power.
But in my new system, i plan to have fast buffers on the cpu itself, and also to the backplane. So when the cpu is not accessing any peripherals, it should be able to run at higher speeds.
I wonder how fast NMOS can really go...

Speaking about the 6850, i got three of those 6850 from ebay for rs232, usb, and ethernet. And as in your case, the chip serial kinda faded.

Where did you get the SID chip?

[Arlet]

Instead of using fast EPROM, how about using slow EPROM, and copy it to fast SRAM. After the copy, replace the EPROM with the SRAM. Alternatively, load the data from a serial flash chip or SD card.

[YT2095]

I started with the 65c02 P4 chips and never really considered overclocking them, then someone mentioned the WDC version at 10MHz (I didn`t even know such a beast existed) so I won 5 brand new ones on fleabay and never really looked back.
as with some of my other computer designs, I like the idea of a chip having Static registers too, so you can stop or step the clock and not have to worry about internal register refresh, so that was another bonus for me, esp after comming from a Z80 build.
the SID chips were pulled from broken C=64`s, I have 2 of them the one starting with the 6 and the other with an 8, both work!
so I`ll probably be using that in a few years time as well when my Son`s old enough to ask for his very own computer too.

I`m hoping to get an update video done soon too, just to clarify the Video Handler issues I as having in the last vid, it`s all fixed now and at a high resolution with no phantom "J"s appearing every ~255 Chrs

[GARTHWILSON]

Quote:

then someone mentioned the WDC version at 10MHz (I didn`t even know such a beast existed)

All of WDC's current production parts are rated for 14MHz minimum, and the 65c02's will mostly go to 24MHz at room temperature (although they don't guarantee that). At least one of their licensees for their IP is running a 65c02 core in a custom IC at over 200MHz.

Note that temperature does affect maximum operating speed. If you find it runs up to a particular speed and back it off only a small percentage, it may still fail to work when the temperature gets higher.

[BigDumbDinosaur]

YT2095 wrote:

I started with the 65c02 P4 chips and never really considered overclocking them, then someone mentioned the WDC version at 10MHz (I didn`t even know such a beast existed) so I won 5 brand new ones on fleabay and never really looked back.

A belated welcome to the 6502.org universe.

It appears that all of the WDC silicon can run reliably at 20 MHZ if powered by 5 volts, and due to the relatively simple nature of the 65C02, Garth's observation about 24 MHz seems doable. At one time, WDC did produce a 65C02 that had a -20 in the part number, but that was before the design was converted to a static core so it could be certified for medical implantation. My experiences with the 65C816 in my POC unit suggest that it too would have no problem at 20 MHz, assuming the glue logic is fast enough.

Incidentally, there are at least two resellers of WDC silicon in the UK. They may be less expensive than eBay auctions.

I'm looking forward to see how NINA progresses.

[GARTHWILSON]

Quote:

Garth's observation about 24 MHz seems doable.

The 24MHz number came from something WDC published. I could not find the particular graph again that I was looking for on their site now, although when looking, I was very pleasantly surprised to see that WDC has a link to my interrupts article . Another graph I did find is Figure 6-2 on page 24 of the Oct. 19, 2010 65c02 data sheet posted on this site which only goes to 20MHz @ 4.25V @ 85°C, and it's easy to extrapolate out to 24MHz @ 5V since the line is so straight. What added a nice extra surprise here though is that it was rated at 85°C, meaning that if you can keep the temperature down near room temperature, it would go even faster (provided the rest of the circuit is up to the job)! Sure it will dissipate more heat at the high speed, but various means could be taken to cool it, whether a simple heat sink, a heat sink with a tiny fan (smaller than what most PCs have), or even a peltier device or other measures.

[BigDumbDinosaur]

GARTHWILSON wrote:

Quote:

Garth's observation about 24 MHz seems doable.

The 24MHz number came from something WDC published. I could not find the particular graph again that I was looking for on their site now...

The "Fmax vs VDD" curve that is published in the 65C816 data sheet clearly shows that 20 MHz can be achieved with 4.5 volts and a chip temperature of 85° C, which implies that 25 MHz would be within reach at 5 volts at a slightly lower temperature. The latter doesn't seem likely though, as timing is critical with the bank address.

Quote:

...I was very pleasantly surprised to see that WDC has a link to my interrupts article .

That link has been there for a while.

Speaking of interrupts, I have been intermittently working on an addendum (appendix B) for your article on processing interrupts in a 65C816 powered system running in native mode. There are some considerations that would matter in a general purpose application that aren't applicable to a 65C02 system or when the '816 is running in emulation mode. It's all based upon the BIOS I developed for the POC computer, whose interrupt system extensively exploits the '816's characteristics, especially those handy stack addressing instructions—the SCSI ISR would have been much more complicated and slower without them.

Quote:

Another graph I did find is Figure 6-2 on page 24 of the Oct. 19, 2010 65c02 data sheet posted on this site which only goes to 20MHz @ 4.25V @ 85°C, and it's easy to extrapolate out to 24MHz @ 5V since the line is so straight. What added a nice extra surprise here though is that it was rated at 85°C, meaning that if you can keep the temperature down near room temperature, it would go even faster (provided the rest of the circuit is up to the job)! Sure it will dissipate more heat at the high speed, but various means could be taken to cool it, whether a simple heat sink, a heat sink with a tiny fan (smaller than what most PCs have), or even a peltier device or other measures.

The 'C02 curve is very similar to that of the '816, but does show that Fmax as a function of VDD is slightly more favorable—4.25 volts at 20 MHz. Extrapolation to 25 MHz sounds perfectly reasonable.

In any case, I don't think maintaining a suitable chip temperature should be a problem in most applications. If the device being powered by the MPU is normally exposed to room ambient, cooling would involve nothing more than a small fan pushing around some air in the MPU's direction. I've done some temperature measurements on my POC unit and determined that at 12.5 MHz, the '816 (PLCC44 package) runs about 3° C above ambient, hardly enough to even think about. I don't foresee 20 MHz operation being a problem in the cooling department. Heck, the 53C94 SCSI controller runs hotter than the MPU, about 8° C above ambient.

Also, recall the CMD '816 add-on cartridge for the C-64, which ran the MPU at 20 MHz with no special cooling provisions. The one individual I knew that had one never mentioned any stability issues with it, which I'm sure would have arisen if the MPU had been running too hot (incidentally, the cartridge's effect on BASIC programs was almost comical—games with FOR-NEXT timing loops went way too fast, making them mostly unplayable).

[GARTHWILSON]

BigDumbDinosaur wrote:

Speaking of interrupts, I have been intermittently working on an addendum (appendix B) for your article on processing interrupts in a 65C816 powered system running in native mode. [...]

It probably warrants its own article, and the two should link to each other. It sounds like it might be too long and too important to be just an appendix.

Quote:

I've done some temperature measurements on my POC unit and determined that at 12.5 MHz, the '816 (PLCC44 package) runs about 3° C above ambient, hardly enough to even think about. I don't foresee 20 MHz operation being a problem in the cooling department.

That's very good to hear. I wonder how much faster it could go then with some real cooling (which might require some kind of measures to keep condensation from causing problems).

[Tor]

GARTHWILSON wrote:

[..]my interrupts article

Speaking of which.. in the table near the end I just noticed that for the μPD70008/A it says that RETI takes "2.08 or 2.4ns at 6.25MHz" - should that be microseconds? Nanoseconds seems fast at 6.25MHz..

-Tor

[GARTHWILSON]

Wow, it took years for someone to find that (or at least report it)! I'll try to fix it as soon as I can. If it were on my website I could fix it in a second (not a millisecond).

My avatar BTW is a portion of one of my cartoons in that article. Mike cut it out and made it my avatar, which gave me a huge laugh. The client whom the secretary is going crazy over was more handsome before the picture size got reduced.