I have Brand boarded a simple 6502 computer but it does not seem to want to function correctly, and I lack some of the tools that may be needed to test, but maybe someone can help me out.
When I turn the unit on with some basic commands in the memory all it wants to do is turn all the address lines on(all high at 3.8 volts, Should it be 5v?) when I check the Data line it is showing that value that is in the very last byte on the ROM.
What would cause all the address lines to go high? I have double checked my wiring and it seems right. even when I hold the reset low some of the address lines are still high, is that normal?
it is a R6502
6502 problem A all High
-
GARTHWILSON
- Forum Moderator
- Posts: 8773
- Joined: 30 Aug 2002
- Location: Southern California
- Contact:
Does the processor have a good ground connection?
Do you have a clean RST signal? The NMOS 6502 did not have a Schmitt-trigger RST\ input like the 65c02 does, so you need a clean edge with no bounce. The RST\ line cannot come up slowly as with an RC.
How's the clock source? Again, the NMOS 6502 did not have an on-board oscillator, and its clock input was more critical than that of the 65c02.
When the processor comes out of reset, it reads the address of the RST routine from $FFFC and FFFD, meaning most (but not all) of the address lines will be high. The RST\ line needs to be held low at least seven clock cycles after the power and clock are stable, but the NMOS had a problem caused by internal heating if the RST\ line was held low more than about a tenth of a second, meaning you have to put a timer on it instead of just debouncing a button.
3.8V is plenty high to qualify for a logic 1, and that's probably all you'll get from an NMOS 6502. The CMOS one puts out nearly 5V.
Obviously I recommend the CMOS version (65c02) for any new projects. It's not just about power consumption. The CMOS one fixed all the bugs of the NMOS one, added a few nice features, and added more instructions and addressing modes.
Note the correct spelling of breadboarded.
Do you have a clean RST signal? The NMOS 6502 did not have a Schmitt-trigger RST\ input like the 65c02 does, so you need a clean edge with no bounce. The RST\ line cannot come up slowly as with an RC.
How's the clock source? Again, the NMOS 6502 did not have an on-board oscillator, and its clock input was more critical than that of the 65c02.
When the processor comes out of reset, it reads the address of the RST routine from $FFFC and FFFD, meaning most (but not all) of the address lines will be high. The RST\ line needs to be held low at least seven clock cycles after the power and clock are stable, but the NMOS had a problem caused by internal heating if the RST\ line was held low more than about a tenth of a second, meaning you have to put a timer on it instead of just debouncing a button.
3.8V is plenty high to qualify for a logic 1, and that's probably all you'll get from an NMOS 6502. The CMOS one puts out nearly 5V.
Obviously I recommend the CMOS version (65c02) for any new projects. It's not just about power consumption. The CMOS one fixed all the bugs of the NMOS one, added a few nice features, and added more instructions and addressing modes.
Note the correct spelling of breadboarded.
Well it took me longer then I want to admit to figure it out...but.
It was a simple problem with the simple program I made to loop around, When I mad it, I was telling the Assembler the program was at 0000 so it would burn properly with my chip writer. so when it would loop using a label it would loop to 000D but the ROM was at E000-FFFF so it should have been jumping to E00D. this mistake caused the cpu to go into a brk.
It was a simple problem with the simple program I made to loop around, When I mad it, I was telling the Assembler the program was at 0000 so it would burn properly with my chip writer. so when it would loop using a label it would loop to 000D but the ROM was at E000-FFFF so it should have been jumping to E00D. this mistake caused the cpu to go into a brk.