A Better 65C265 Board
Re: A Better 65C265 Board
Hmm, we're getting quite a way off topic here... if we keep throwing out strong opinions about unrelated things, we'll keep getting responses with more strong opinions.
Re: A Better 65C265 Board
I've updated the 265iromlist.txt file on page one of this topic.
Cheers,
Andy
Cheers,
Andy
Re: A Better 65C265 Board
handyandy wrote:
I've updated the 265iromlist.txt file on page one of this topic.
Re: A Better 65C265 Board
Doing a cursory exam of my '265 rom reveals different vectors from the one in the 265irom.pdf.
Rom version is 2.07 assembled Monday Feb 6 10:10.26 1995 from inspecting addresses 00:E0B7-00:E106.
Point of interest is IRQAR3 at 00:FFAC
pdf: FC75
my rom: FC5C
The code however is the same as the code in the pdf. There is room for improvement for the internal rom and there's a mechanism for replacing the internal rom with an external one.
Although WDC claims support for baud rates up to 115k it seems the tables and code top out at 57.6k
There's a lot of code for setting the data bank to zero using PEA #0000 PLB PLB. Since the rom is already in bank 0 and program bank is automatically set to zero on hardware or software interrupt it seems reasonable to replace the previous code with PHK PLB.
Cheers,
Andy
Rom version is 2.07 assembled Monday Feb 6 10:10.26 1995 from inspecting addresses 00:E0B7-00:E106.
Point of interest is IRQAR3 at 00:FFAC
pdf: FC75
my rom: FC5C
The code however is the same as the code in the pdf. There is room for improvement for the internal rom and there's a mechanism for replacing the internal rom with an external one.
Although WDC claims support for baud rates up to 115k it seems the tables and code top out at 57.6k
There's a lot of code for setting the data bank to zero using PEA #0000 PLB PLB. Since the rom is already in bank 0 and program bank is automatically set to zero on hardware or software interrupt it seems reasonable to replace the previous code with PHK PLB.
Cheers,
Andy
Re: A Better 65C265 Board
It's been over a year now since this topic has been touched on.
In my previous post I alluded to a serious bug in the internal rom of my 65c265 mpu. It can be fixed if the internal rom is switched out with a modified external rom for addresses $00: E000 to $00: FFFF. Maybe that's why the '265SXB has the flash rom chip for modifying memory from $00: 8000 to $00: FFFF.
A further optimization might be to tie all the RTI instructions to a common place since they all fix the stack and return:
Cheers,
Andy
In my previous post I alluded to a serious bug in the internal rom of my 65c265 mpu. It can be fixed if the internal rom is switched out with a modified external rom for addresses $00: E000 to $00: FFFF. Maybe that's why the '265SXB has the flash rom chip for modifying memory from $00: 8000 to $00: FFFF.
A further optimization might be to tie all the RTI instructions to a common place since they all fix the stack and return:
Code: Select all
_interrupt routine: ; there are a lot of routines in the 265romlist.pdf that start this way but some are
; mixed up in order
longai ; macro for 16 bit m and x
PHB
PHA
PHX
PHY
PHD
PEA #$0000 ; always point to zero page for rom routines
PLD
PHK ; always bank 0 on interrupt
PLB
... do some processing ...
JMP (or BRL/BRA) _RTI
_RTI:
longai ; just to be sure
PLD
PLY
PLX
PLA
PLB
RTI
Andy