Generating Video Signals

Topics relating to PALs, CPLDs, FPGAs, and other PLDs used for the support or creation of 65-family processors, both hardware and HDL.
jmthompson
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Joined: 30 Dec 2017
Location: Detroit, Michigan, USA
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Re: Generating Video Signals

Post by jmthompson »

cbmeeks wrote:
jmthompson wrote:
It outputs a 640x480 60 MHz signal,
Great work. But I think you mean 60 Hz. :-D
Haha yes, 60 Hz. :)

I've also almost got the RAM sharing working; since I only need pixel data at most every 40 ns, and I've got 15 ns RAM, I've updated the design to basically behave as a 128Kx8 SRAM with a 40ns access time. VGA data is fetched on rising clock edges and CPU R/W cycles are executed on the falling edges. 40ns should be good enough for a CPU up to 12 MHz or so if my math is correct.
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