6502.org

Judging from the "typical" propagation delay mentioned in the datasheets of the ICs used in this design,
we think that OurCPU could (in theory) make 20MHz (when not using the "illegal" NMOS 6502 OpCodes).

This would be nearly the MIPS rating of an 80486.

;---

OurCPU supports three instruction sets:

NMOS 6502 including most of the "illegal" Opcodes,
65C02 including the Bit testing/manipulating stuff,
and K24 (which is a "65816 subset" with 8 Bit registers and a non_multiplexed 24 Bit address bus).

In theory, it should be possible to switch between those three instruction sets by software during runtime.

50 ns, wow, that's pretty good. But I suppose there's some added propagation delay in 'travelling distance'.
Cool. So it all hinges on microcode I suppose.

We'll see how fast the CPU goes after Drass got it up and running.

To get down to those (hypothetical) 50ns, it was neccessary to pull quite a few tricks.
Including pipelined microcode and some hardware logic checking for 1 Byte instructions...

IIRC the microcode defaults to reading a Byte from [PC+] in memory for the cycle after an instruction fetch... for all instructions.
If the logic detects a 1 Byte instruction, it blocks writing PC+1 to PC and discards that additional Byte.

BTW: I think the NMOS 6502 had some logic inside which checked for 1 Byte instructions, too.
Yep.
The "basic" CPU has two PCBs.
A third PCB is required to have K24 instruction set, 24 Bit address bus,
and to be able to switch between the different instruction sets by software.

Thanks for the several suggestions folks. I finally had a chance to get back to the panel, and did as dr Jefyll suggested, bracing the thing with a piece of lumber along the edge of the workbench. Applying firm pressure to the overhanging portion of the panel produced a clean break along its length. From there, I could easily snap the resulting half-panels by hand. Some fine sandpaper is all that was needed to smooth out the rough edges. Nice!
The copper planes are 15mil away from all board boundaries, even those internal to the panel. I can easily see these gaps when holding the PCBs up to a light, and checking for shorts between VCC and GND confirmed there does not seem to be a problem there.
Fingers crossed on that! Below is a table showing various paths through the CPU and approximate propagation times for different logic families. The column labeled "AC+ Typ" is the relevant one for this build (i.e., mostly 74AC logic with a few 74LVC and 74CBT parts thrown in). The ALU and Microcode Fetch share top-honours as the critical path. As well as some fancy footwork in the ALU by ttlworks and dr Jefyll.
Yes, that's right. Here is a description of the pipeline logic.
I couldn't resist stacking the new PCBs with the old SBC just to have a look. It may serve as much needed inspiration for the task ahead. I can already see it running ... Cheers for now,
Drass

Go, Drass, go!

Yes, but in which direction ?

It's been really busy lately, but I finally made some progress on the project. Card A - "Registers" is now done! (on the left below)It was very gratifying to confirm that the pins on the vertical header fit precisely when the SBC is stacked on top of this card - just as planned. These pins correspond to those on the 65C02 IC, which can then be removed from the SBC to have the system operate with the TTL CPU instead. It's a tidy arrangement, but not very practical for debugging. I'll probably use ribbon cables to connect things initially so I can have better access.

The soldering is going well, but I did manage to bridge GND and VCC at some point on this card. Frustrating. I was forced to systematically remove components until I found the culprit - a capacitor with too much solder was bridging the pads underneath. Re-soldering it cleaned up the problem. (Lesson learned - I am now testing for shorts very regularly as I go ). That little mishap set me back a bit, but in fact I'm much faster now than when soldering the SBC. I've taken quite naturally to using a "drag" technique on the SOIC packages, which now feels very comfortable. Amazing what the right tools and a little practice will do.

I've made a start on Card B - "ALU & CU", by far the most dense PCB on the project. Once that's done, I can fit the two cards together and begin the first tests of the CPU - very exciting!

Cheers for now,
Drass

Very nice!

Axel

Card A and Card B now soldered, which together constitute a complete TTL 6502 (the third K24 card being optional). A real 6502 is shown below for scale Next step is to program the microcode ROMs and give the thing a try. This timing is rather auspicious as the first post on this thread was on Oct 19th, 2015. How great would it be to have the CPU come to life exactly two years later! Fingers crossed. (Btw, has it really been two years? Wow). Gotta say, I'm on pins and needles about it - it's worth remembering that these PCBs have nearly as many ICs on the underside as they do on the top layer. Sure hope I can get the thing to work after all that effort! As always, thanks for all the encouragement along the way.

Cheers for now,
Drass

Spectacular!

Wow, really impressive-looking! Those boards remind of the stuff I worked on back in the 1970s. Gobs and gobs and gobs of chips, although they were all DIP, not SMD, and the boards were much larger. I couldn't imagine soldering that many SMD chips.
Well, let's hope she goes and doesn't blow!

Happy Anniversary !
Those two years had passed by quite fast.

The populated PCBs look nice, let's just hope that they work as nice as they look.

Good luck and god speed for the first test runs.

...Not to discourage you, but there still is a chance that we might have to improvise a CO2 filter or such
by using some duct tape and the envelope of a C64 manual.
// This was a reference to Apollo 13.


BTW: after building your third TTL CPU, the magic tends to wear off a bit,
and from there it feels like just another engineering job somehow.

Spanktacular !

I'm thinking : 'The 6574'.

Hmm... finding a good "number" for that CPU ain't easy.

From the Motorola notation, 657x\687x almost sounds like sort of a clock generator.
Besides that... if the next project would be (hypothetically spoken) a TTL implementation of the 6526, how to name it ?

7402 already is taken (quad input NOR gate).
8500 almost sounds like (godforbid) 8085.

I'd vote for 7502.

What's wrong with 6502-???, where ??? is the number of chips it took to build the contraption?