Say you had a process that allowed to you build a modular CPU (based on the 6502) with selectable blocks handling various registers, addressing modes, RAM, ROM and so on....
Then you get your programmer(s) to write the code on a conventional 6502 system, then analyse the code - Maybe the process might look like "oh look, you only used Y twice, can you remove it?" , or "Ah, 129 bytes of RAM, could it be 128?", ... Lather, rinse, repeat until you get the least used instructions, least RAM and so on - maybe bigger code, but ROM is cheaper than RAM, so ..... Then feed the code into the CPU generator and off you go...
But I really don't know if such a thing exists... (or could exist back in the mid-late 90's)
Say you had a process that allowed to you build a modular CPU (based on the 6502) with selectable blocks handling various registers, addressing modes, RAM, ROM and so on....
One simple way to do that would be to have a synthesizable core, remove all the parts you don't need/are static, and then let the tools do the optimizations.
It always astonishes me how much they'll strip back to save a few pennies.
As much as a fan as I am of the 6502, I would consider it a pretty basic architecture - stripping away what little functionality exists seems like madness!
But, I suppose, its a case of which saves more money: £20,000 in extra programmer's headaches or 2p per unit sold... If you're selling more than a million units, the latter!
You also have to consider time to market. Somewhat related, in the late 1980's, my boss kept coming up with ideas of how his envisioned product could go with one less digit of display, to save money. He seemed kind of disappointed (for ego reasons) that we found the 1x16 intelligent character LCD modules which were available off the shelf and cheaper than his idea and better in every way with no development time & cost required on our part for a custom display.
Haha, you should have a look at the PDP-8 instruction set sometime.
I would recommend any 6502 fan take a look at the PDP-8 instruction set. You'll see similarities between that architecture and the 6502. Specifically the use of memory pages, and addressing modes like page zero and page zero indirect. But the 6502 is luxurious in comparison with its X and Y registers, and a call stack!
Haha, you should have a look at the PDP-8 instruction set sometime.
I would recommend any 6502 fan take a look at the PDP-8 instruction set. You'll see similarities between that architecture and the 6502. Specifically the use of memory pages, and addressing modes like page zero and page zero indirect. But the 6502 is luxurious in comparison with its X and Y registers, and a call stack!
I did actually have a look at Commodorejohn's urging, and it is certainly an.... interesting architecture. Though I did like the concept of the OPR instruction, I'm not sure I've ever seen anything quite like it elsewhere. Its almost like a "build your own instruction" instruction. Actually, now I think about it, it resembles some of the accidentally-useful-combinations of the NMOS 6502's undefined instructions.
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Though I did like the concept of the OPR instruction, I'm not sure I've ever seen anything quite like it elsewhere. Its almost like a "build your own instruction" instruction. Actually, now I think about it, it resembles some of the accidentally-useful-combinations of the NMOS 6502's undefined instructions.
The PDP-8 could process three microcoded instructions in a single cycle, which made them really useful for creating commonly needed constants. It provided some of the value of a load immediate instruction, but in a really obscure and roundabout way.