W65C265 Multiplexed Pins (PIB and UART3) - Custom Board

For discussing the 65xx hardware itself or electronics projects.
User avatar
GARTHWILSON
Forum Moderator
Posts: 8774
Joined: 30 Aug 2002
Location: Southern California
Contact:

Re: W65C265 Multiplexed Pins (PIB and UART3) - Custom Board

Post by GARTHWILSON »

tokafondo wrote:
Who knows... maybe some day WDC surprises all of us with a fpga based '265s, so what you say can be achieved.
They're going beyond that even now, using the MAX-10 FPGA:
https://wdc65xx.com/fpga-microcontrollers/
http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?
Jmstein7
Posts: 379
Joined: 30 May 2021

Re: W65C265 Multiplexed Pins (PIB and UART3) - Custom Board

Post by Jmstein7 »

GARTHWILSON wrote:
They're going beyond that even now, using the MAX-10 FPGA:
https://wdc65xx.com/fpga-microcontrollers/
The issue with the demo FPGA boards is the internal ROM (again). It limits what you can do with the dev boards. And, as of yet, I have not figured out a way to deactivate the ROMs (without reprogramming the whole thing). At least the '265s allow you to bypass the internal ROM with that "WDC" bytes trick.

However, I do see that they are issuing (or have issued?) FPGAs called simply "W65CX65MMC". It looks like you will be able to flash soft FPGA cores to these. Maybe you can flash custom ROMs, too? Not much info out there.

https://www.mouser.com/ProductDetail/We ... DE%2F6Q%3D

https://www.wdc65xx.com/wdc/documentati ... x65mmc.pdf
Jmstein7
Posts: 379
Joined: 30 May 2021

Re:W65C265 Multiplexed Pins (PIB) - Custom Board UPDATE

Post by Jmstein7 »

Hey, so I just wanted to post an update on this. I got the W65C265 system up to 8mhz, by making a slap-dash adapted that let me replace the EEPROM with a much faster SST39SF010A-55 NOR Flash. (bottom pic, overhead view).

I used the same trick for a second-processor card I made for the PIB, with a 65C02 clocked at just over 14mhz. I can offload programs there and use it as an application processor, with the 65C265 doing I/O. (middle Pic)

I also built another board for the PIB, a PIC18F47K40 PIB board that let's the 65C265 use that processor and all of its peripherals (first pic), as well as 512kbits of serial SRAM the 65C265 can access.

Now it's time to write some software!

Jon

PS I have some transputers, StrongARMs, and other bits of tech on the way to integrate and tinker with!
PPS Sorry for the crappy pics!
Attachments
IMG_7341.jpg
IMG_7346.jpg
IMG_7339.jpg
User avatar
drogon
Posts: 1671
Joined: 14 Feb 2018
Location: Scotland
Contact:

Re: Re:W65C265 Multiplexed Pins (PIB) - Custom Board UPDATE

Post by drogon »

Jmstein7 wrote:
PS I have some transputers, StrongARMs, and other bits of tech on the way to integrate and tinker with!
Myself (and I know 1 or 2 others here) worked with transputers "back then", so it'll be interesting to see if you come up with some 6502/transputer "frankenputer" :-)

Also my multi-tasking OS I run on my '816 boards is loosely based on the transputer threading model too. It all happens at the "microcode" level (which is the byetcode VM that BCPL compiles into).
Quote:
PPS Sorry for the crappy pics!
Looks fine to me!

-Gordon
--
Gordon Henderson.
See my Ruby 6502 and 65816 SBC projects here: https://projects.drogon.net/ruby/
Jmstein7
Posts: 379
Joined: 30 May 2021

Re: Re:W65C265 Multiplexed Pins (PIB) - Custom Board UPDATE

Post by Jmstein7 »

drogon wrote:
Myself (and I know 1 or 2 others here) worked with transputers "back then", so it'll be interesting to see if you come up with some 6502/transputer "frankenputer" :-)

Also my multi-tasking OS I run on my '816 boards is loosely based on the transputer threading model too. It all happens at the "microcode" level (which is the byetcode VM that BCPL compiles into).
That makes sense. I mean, as far as I've learned, most transputer systems used host processors - fancy SPARC and MIPS hosts for the educational institutions and big businesses, and x86 PC hosts for the common folk ;-)

So, I guess this would fit in the latter category.

And, of course, I'm familiar with your RUBY OS. I've seen it integrated with a few projects up on YouTube, as well.

I can cobble the hardware together, but doing software - I find that to be far more difficult.

Jonathan
User avatar
Sheep64
In Memoriam
Posts: 311
Joined: 11 Aug 2020
Location: A magnetic field

Re: W65C265 Multiplexed Pins (PIB and UART3) - Custom Board

Post by Sheep64 »

Jmstein7 on Mon 11 Apr 2022 wrote:
I can't get FCLK over 6mhz.
I have a horrible feeling that W65C265 has 150ns EEPROM. I hoped that a surface mount package with multiple power and ground pins could be easily clocked beyond 20MHz. This may remain possible but it would require any ROM access (including vectors) to be clock stretched.
Jmstein7
Posts: 379
Joined: 30 May 2021

Re: W65C265 Multiplexed Pins (PIB and UART3) - Custom Board

Post by Jmstein7 »

Sheep64 wrote:
I have a horrible feeling that W65C265 has 150ns EEPROM. I hoped that a surface mount package with multiple power and ground pins could be easily clocked beyond 20MHz. This may remain possible but it would require any ROM access (including vectors) to be clock stretched.
Your feeling was correct. I now have 55ns external flash ROM, and I can get the W65C265 up over 8mhz. EEPROMs are a pretty terrible hinderance.
Post Reply