Kernel User Interrupt

[speculatrix]

Coincidentally, I’ve just been grappling with something similar. Although my skills here are basic, I have documented what I did here: https://mansfield-devine.com/speculatri ... ng-system/

[BigEd]

Ah, thanks, I see now!

[Andre]

Hi

Spotted an error if anybody was looking closely.

Quote:

...yes it was a 10ms timer interrupt
JMP ($04F0) ; jump to vector1 interrupt
_vector1_return:
INC SYSTEM_TIMER
CLC
LDA SYSTEM_TIMER
CMP #$64 ; HAS TIMER REACHED 100 (0x64)
BCC _exit_irq
LDA #$00
STA SYSTEM_TIMER
INC SYSTEM_SECONDS

JMP ($04F2) ; jump to vector2 interrupt
_vector2_return:
_not_via:

JMP ($04F4) ; jump to vector3 interrupt
_vector3_return:
_exit_irq:
PLA
PLX
PLY

_irq_last_byte_address:
RTI ; Return from IRQ interrupt

the line BCC _exit_irq should be a BCC to _not_via
otherwise the JMP(indirect) for vector3 will be missed.

This is still all work in progress so testing is limited.

Regards
Andre

[BigDumbDinosaur]

Andre wrote:

Code: Select all

...yes it was a 10ms timer interrupt
JMP ($04F0) ; jump to vector1 interrupt
_vector1_return:
INC SYSTEM_TIMER
CLC
LDA SYSTEM_TIMER
CMP #$64 ; HAS TIMER REACHED 100 (0x64)
BCC _exit_irq
LDA #$00
STA SYSTEM_TIMER
INC SYSTEM_SECONDS

JMP ($04F2) ; jump to vector2 interrupt
_vector2_return:
_not_via:

JMP ($04F4) ; jump to vector3 interrupt
_vector3_return:
_exit_irq:
PLA
PLX
PLY

_irq_last_byte_address:
RTI ; Return from IRQ interrupt

Surrounding your code snippets with code brackets will make it a little easier to read.

[teamtempest]

Code: Select all

...yes it was a 10ms timer interrupt
JMP ($04F0) ; jump to vector1 interrupt
_vector1_return:
INC SYSTEM_TIMER
CLC
LDA SYSTEM_TIMER
CMP #$64 ; HAS TIMER REACHED 100 (0x64)
BCC _exit_irq
LDA #$00
STA SYSTEM_TIMER
INC SYSTEM_SECONDS

An alternative might be to count down instead of up:

Code: Select all

JMP ($04F0)
_vector1_return:
DEC SYSTEM_TIMER
BNE _exit_irq
INC SYSTEM_SECONDS
LDA #100
STA SYSTEM_TIMER

[Sheep64]

Andre on Fri 22 Apr 2022 wrote:

Code: Select all

_exit_irq:
PLA
PLX
PLY

That is an unusual order. On NMOS 6502, PHA // TXA // PHA // TYA // PHA is traditional. On 65C02, this can be compacted to PHA // PHX // PHY and would be reversed with PLY // PLX // PLA. Unless the IRQ handler begins with PHY // PHX // PHA, the software running outside of interrupt will have its register contents shuffled.