Loads of 6502 hacks in a forum

[Nightmaretony]

ok, voyage of discovery, ran across a whle bunch of stuff, but you may enjoy this all from Atariage.com....

6502 programming hacks...
http://www.atariage.com/forums/index.ph ... opic=71120

[Bry]

Another AtariAge topic I participated in...

http://www.atariage.com/forums/topic/14 ... mi-timing/

Although the original 6502 documentation states that an NMI pulse only needs to be 2-cycles to be acknowledged, this isn't true if an IRQ happens at the same time. Most systems hold /NMI longer (or until cleared by software) but Atari's Antic does two cycles only and this can lead to lost NMI's when IRQ's are enabled.

Extending NMI to 8 cycles solved the problem, so another small 6502 bug for the list (although I don't yet know how many cycles it must actually be, I've proven it's 8 or less).

-Bry

[BigDumbDinosaur]

Nightmaretony wrote:

ok, voyage of discovery, ran across a whle bunch of stuff, but you may enjoy this all from Atariage.com....

6502 programming hacks...
http://www.atariage.com/forums/index.ph ... opic=71120

Of course, some of that stuff won't work on the C02, etc., due to the use of undocumented opcodes.

[GARTHWILSON]

Quote:

Extending NMI to 8 cycles solved the problem, so another small 6502 bug for the list (although I don't yet know how many cycles it must actually be, I've proven it's 8 or less).

I wonder if that's basically the same as the IRQ-coinciding-with-BRK-instruction bug which was also fixed in the 65c02. AFAIK, all the NMOS 6502 bugs were fixed in the CMOS 65c02.

[Bry]

GARTHWILSON wrote:

Quote:

Extending NMI to 8 cycles solved the problem, so another small 6502 bug for the list (although I don't yet know how many cycles it must actually be, I've proven it's 8 or less).

I wonder if that's basically the same as the IRQ-coinciding-with-BRK-instruction bug which was also fixed in the 65c02. AFAIK, all the NMOS 6502 bugs were fixed in the CMOS 65c02.

The 400/800 used a regular 6502 and the XL/XE lines used Atari's modified "Sally" 6502C (the main difference is a tri-state address bus, and some extra clock control to reduce parts count). Both of these chips exhibit the problem of lost NMIs.

If I had to guess, I'd say I believe this and the BRK bug are due to the simple nature of the interrupt logic that can lose a transitory event while in certain set-up states.

In the linked thread, someone tried a 65C02 in an 800 and the problem went away so I agree that the 65C02 is fixed.

[GARTHWILSON]

Quote:

used Atari's modified "Sally" 6502C (the main difference is a tri-state address bus, and some extra clock control to reduce parts count)

Just as a note-- WDC's 65c02's do have a BE (bus-enable) input (pin 36 on the DIP) that allows tri-stating the bus, a ML\ (memory-lock) output (pin 5 on the DIP), and a VP\ (vector-pull) output (pin 1 on the DIP), and all 65c02's have an on-board clock oscillator.

[kc5tja]

That's because both of those chips are NMOS. The 65C02 is not the 6502C.

[Bry]

kc5tja wrote:

That's because both of those chips are NMOS. The 65C02 is not the 6502C.

Right. Atari's 6502C is just a NMOS 6502 with some of the TTL required for Antic's DMA moved into the chip and predates the 65C02. The 400/800's CPU board contains the equivalent circuit and a stock 6502.

Anyway, the problem is annoying but we came up with a couple work-arounds. I'm actually surprised that it wasn't well-documented a long time ago (in Atari circles, that is...)