65c816 "Core"

[GamerFox]

I've been meaning to make an '816 based project that's running at 4 MHz and I've cobbled together this MPU and timing "core" the system will use. Is using 74HC's okay for this and will the timing work?

[cjs]

I assume that the two inverters between CLK and PHI2 are to delay CLK slightly? What's the reasoning behind that, and where do you use CLK vs. PHI2 and why?

Am I right that you're "trimming" the active time for the data bus transceiver at both ends using the U107A NAND gate by using CLK and a further-delayed version of PHI2 as the inputs?

[kernelthread]

I'm not entirely sure what your nRD and nWR signals are being used for, but I suspect they aren't doing what you want. The way you have them derived on the schematic:

1. When the processor input clock is high, one input of each of U107B and U107C is low, and so both nRD and nWR are high, i.e. inactive. If they are meant to be Intel-style bus control signals, you want them active when the processor input clock is high, since that is when data transfer occurs.
2. When RnW is low, U107B pin 5 is low, so nWR is high, i.e. inactive. Similarly when RnW is high, nRD is inactive. U107C pin 10 should be connected to RnW directly and U107B pin 5 should be connected to inverted RnW in order to get nRD low when you're reading and nWR low when you're writing.

Also, if pin 1 of the HC245 is high, A is input and B output. This is the wrong way round since pin 1 is high when RnW is high, so the processor is reading - A needs to be output in order to drive the CPU data lines.

[BigDumbDinosaur]

GamerFox wrote:

I've been meaning to make an '816 based project that's running at 4 MHz and I've cobbled together this MPU and timing "core" the system will use. Is using 74HC's okay for this and will the timing work?

Can you please repost your schematic in monochrome?

As for 74HC logic, it will be more-than-adequate in your glue logic. However, the clock generator flip-flop should be 74AC or possibly 74AHC (I have not tried the latter in a clock generator to date). The reason is clock specs for the 816 require a maximum rise/fall time of no more than 5ns, which is generally not achievable with 74HC logic. Also, you want your clock to have sufficient fanout to support other parts of the circuit that are dependent on it. A less-than-robust clock signal can cause all sorts of nuisance problems.

For the bank latch and data bus transceiver, I'd consider something faster, e.g., 74AHC. In particular, successfully latching the bank bits is a timing-critical aspect of 65C816 circuitry. You may be able to get away with using 74HC here, but there's no downside to using 74AHC. It has the "gentle" edges of 74HC, but the low propagation time of 74AC.

Once you've posted a monochrome schematic I can go over it in detail and advise if there appear to be any timing "gotchas" waiting to "getcha."

You don't mention how you plan to build this unit. The manner of construction, e.g., breadboard, PCB, etc., can have a significant effect on how well the unit will run. Some construction methods are more forgiving than others...

One other thing: a memory map would be helpful in spotting any potential glue logic errors.

[cjs]

BigDumbDinosaur wrote:

Can you please repost your schematic in monochrome?

Since this is presumably a problem for everything in colour on your screen, why not just turn on the colour blindness compensation in your OS? (In Windows 10 this is in the Settings app under Ease of Access » Color Filters.)

Regardless of method, I'm sure you can understand that it's a lot more efficient for you to develop a technique to deal with this once than ask every new poster to replicate this work just for you. Lots of us (including me) have visual issues of various kinds, and asking all posters to compensate for all of these on the source side would be a bit ridiculous.

[floobydust]

Ouch... that was harsh.

While I don't have any vision impairments yet, I too am not a fan of many of the new fangled schematic drawing aids. In many cases the default colors and line widths are poorly chosen. I've been drawing schematics for well over 50 years... the old days were pencil on graph paper. Back in the 80's, I customized a set of menus and created a set of components for an earlier release of AutoCAD... and always in black and white... as it's always easy to read.

Then again, there's still a good percentage of the technical world that doesn't run Windows as a workstation, who knew.

[GamerFox]

Here's the monochrome version.

[cjs]

floobydust wrote:

Ouch... that was harsh.

I'm sorry; I didn't mean it to be harsh. It just seems to me that, now that we have tools to adjust for specific impairments locally, just doing what we need ourselves is faster and easier for everyone than going back and forth and asking people again and again to make a second copy of the schematic that's adjusted for an impairment. (As I mentioned, I have some vision issues, too, and I do use local tools to help deal with postings here and elsewhere where I have issues.)

Quote:

Then again, there's still a good percentage of the technical world that doesn't run Windows as a workstation, who knew.

I don't use Windows as often as Linux, but Windows does seem to be the most popular desktop platform so I thought that posting instructions for that would have the best chance of being a "what to do" rather than a "search for something like this on your system." As I mentioned, other systems do support similar accessibility functions.

I should also mention that I not only have no objection to monochrome schematics; I have a slight preference for them over the default colours that KiCad produces. This isn't about colour preferences, it's about handling accessibility issues.

[BigDumbDinosaur]

cjs wrote:

BigDumbDinosaur wrote:

Can you please repost your schematic in monochrome?

Since this is presumably a problem for everything in colour on your screen, why not just turn on the colour blindness compensation in your OS? (In Windows 10 this is in the Settings app under Ease of Access » Color Filters.)

Your presumption is wrong.

It has nothing to do with video displays and everything to do with having tritanomaly, an inherited form of color-blindness. Certain color combinations will result in one of the colored objects being difficult or impossible for me to see. For example, a blue line on a white or yellow background will be invisible to me. Ditto for light green on a white or yellow background. That is why I have trouble reading schematics drawn in color.

If there were a way to compensate for tritanomaly by fiddling with display adjustments, I would have dealt with it long ago. There isn't a way—the so-called color-blindness compensation in Windows et al is mainly of value to individuals who have deuteranomaly.

Unless you have tritanomaly or the similar, but worse, tritanopia, may I suggest to you to put your brain in gear before engaging your (metaphoric) mouth when I ask for a schematic to be posted in monochrome?

[BigDumbDinosaur]

GamerFox wrote:

Here's the monochrome version.

Thank you. I've printed it on tabloid paper and will give it a good look.

[cjs]

BigDumbDinosaur wrote:

Unless you have tritanomaly or the similar, but worse, tritanopia, may I suggest to you to put your brain in gear...

Sorry. My poor brain thought that the "Blue-yellow (tritanopia)" setting in Windows might be made for people like you.

Quote:

...before engaging your (metaphoric) mouth when I ask for a schematic to be posted in monochrome?

Well, if there is indeed no easy setting in Windows (because tritanomaly is substantially different from tritanopia) you can still do something similar to what I do: use image editing features to tweak things. It's the work of a couple of seconds to select an area on your screen with Windows-Shift-S, click the resulting message, click "Edit with..." and "Photos," and then drop on a filter to turn what you just selected into black and white.

Again, the real point here is that you expect dozens of people to do extra work to help just you when pretty much the same result could be achieved by only one person doing similar work. And I find it very hard to believe that if, say, a client sends you something in colour you can't see you simply dump the client if he won't conform to your needs.

[BigDumbDinosaur]

cjs wrote:

Again, the real point here is that you expect dozens of people to do extra work to help just you...

Wrong again. In this case, I am the one who is offering the help. Asking for a schematic to be posted in monochrome is a reasonable request in exchange for gratis assistance. I tried printing the color schematic with color off and still couldn't read some of it.

[cjs]

BigDumbDinosaur wrote:

In this case, I am the one who is offering the help. Asking for a schematic to be posted in monochrome is a reasonable request in exchange for gratis assistance.

Hm. I'd not thought about it that way. Ok, that's fair.

[BigDumbDinosaur]

Getting back to the topic at hand, I've examined your schematic and now see you are going to run on 3.3 volts. Here are some observations in no particular order:

1. My earlier comment about 74HC logic being suitable is now a qualified one. CMOS logic slows down when run at lower voltages. Be sure to work out your timing with that in mind.
   
   That said, the clock flip-flop (U105A) should be a 74AC74. The 74HC74's output edge rate is too slow to meet the WDC requirement of 5ns maximum. It may be possible to use a 74AHC74 here, but I have not tried that in a clock generator circuit. As always, YMMV.
2. I recommend you use a 74AHC573 for the bank latch (U102) and a 74AHCT245 for the data bus transceiver (U103). Use of AHCT logic for the transceiver accounts for modern static RAM, almost all of which produces TTL-level outputs with a guaranteed VOH of 2.4. While 2.4 volts is marginally in the range of an acceptable CMOS logic 1 on 3.3 volts, use of an AHCT transceiver will give you better noise immunity when the MPU is in a read cycle.
3. I see two inverters (U106A and U106B) in series with the Ø2 signal going to the MPU. There is no good reason for that, as it will skew the MPU's notion of the clock relative to the rest of the system. Also, see my previous comment about driving the MPU's PHI2 input with 74HC logic. PHI2 on the MPU should be directly driven from the Q output of the clock flip-flop (U105A).
4. You have yet another inverter (U106C) clocking the LOAD input on the bank latch (U102). Commensurate with the change I suggest in 3. above, LOAD should be connected to the clock flop's (U105A) /Q output. That arrangement will assure that LOAD is driven low at the instant when the MPU's PHI2 is driven high. Doing so gives you the best timing window for this critical function.
5. As with the bank latch, the CE input on the data bus transceiver (U103) should be driven from the clock flop's /Q output. There is no need for either of the gates you currently have connected to CE.
6. I recommend you add a pullup resistor to the reset line, even though the MCP100 reset generator does drive it high when out of reset. The problem is that drive is a bit on the weak side and could under some conditions make the system vulnerable to a spurious reset due to noise. 3.3K is a suitable value. You may be able to use RN101 for this purpose.
7. Your read/write generator circuit (U106E, U107B and U107C) can be implemented entirely with the NAND gate (74HC00) alone, since section U107D of that gate is not used in your present circuit. See below for an example circuit.
   

   

   x86-Style Read/Write Generator

   The above shows the use of 74AC logic. In your application, 74AHC would be a better choice.
8. VPB (vector pull) on the MPU is an output, hence does not need a connection to resistor network RN101.
9. RDY on the MPU is a bi-directional pin that must be pulled up, which you can do by attaching it to RN101. When RDY is low the MPU will stop on the next high-to-low transition of the clock, which is why you can't let it float. Note that RDY should never be directly connected to Vcc or to the output of another gate.

That's all I can see for now. Hope it helps.

[BigEd]

(Welcome, Gamerfox! I hope you get the help you need and can at some point in the future post about your fully working system!)