The F-1 (aka "I Was Too Excited to Draft the UART Circuit")

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Individual_Solid
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Re: The F-1 (aka "I Was Too Excited to Draft the UART Circui

Post by Individual_Solid »

So, of course, I'm planning the next revision! The circuit is not going to change significantly, mostly I'm trying to slim the layout down, make a more useful control header, and add a power switch.

I am considering replacing the DS1813. Mouser has the DS1813 for ~$2.30USD (depending on the tolerance you choose). An ATtiny14 is ~$1.40USD.

Attiny14 proposed pinout:
1- RESET pushbutton
2- External Oscillator In
3- NMI Pushbutton
4- GND
5- CLK/PHI2 Out (generated from OC0A timer compare out)
6- /RESET Out (pulse emitted upon reset of the AVR)
7- /NMI Out (debounced pushbutton)

This (as you could infer) provides debounced /RESET & /NMI, as well as a timer driven clock source (adjustable through reprogramming, not on board).

I'm guessing the brownout detector on the attiny14 is not quite as sophisticated as the power supervision in the DS1813, but I do believe that it will still reset the AVR until the power supply is stable. The only problem is that the actual RESET signal for the 6502 wouldn't be emitted until the AVR finishes reset (instead of being brought into reset as soon as brownout is detected). I think for hobby purposes this may be fine?

I haven't specc'd a DS1813 for my NMI line yet, but I know many folks have talked about it as an option. It seems convenient that the one cheaper attiny could replace the two DS1813s...

Any thoughts on this line of inquiry?
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GARTHWILSON
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Re: The F-1 (aka "I Was Too Excited to Draft the UART Circui

Post by GARTHWILSON »

Individual_Solid wrote:
The only problem is that the actual RESET signal for the 6502 wouldn't be emitted until the AVR finishes reset (instead of being brought into reset as soon as brownout is detected). I think for hobby purposes this may be fine?
I'm not familiar with the AVRs, but if it boots up with the pins in input or high-impedance state, maybe you could have a resistor pull-down, and when the AVR comes out of its own reset and gets into its reset routine, it can make that pin an output and bring it high when the desired amount of time has lapsed.
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Re: The F-1 (aka "I Was Too Excited to Draft the UART Circui

Post by BigDumbDinosaur »

Individual_Solid wrote:
Attiny14 proposed pinout:

1- RESET pushbutton
2- External Oscillator In
3- NMI Pushbutton
4- GND
5- CLK/PHI2 Out (generated from OC0A timer compare out)
6- /RESET Out (pulse emitted upon reset of the AVR)
7- /NMI Out (debounced pushbutton)

If you are going to use the AVR as the clock generator for the MPU make sure the AVR's rise/fall times are within the limits specified by WDC, which are currently 5ns. While the MPU will likely tolerate a slower rise/fall time, you probably should not bank on that. An out-of-spec clock can cause subtle errors that will be difficult to identify.

Also, you need to assure reasonable clock symmetry from the AVR if you are going to run your unit at double-digit speeds. It's only a slight exageration to say as Ø2 approaches the maximum (officially 14 MHz), clock symmetry becomes critical to achieving stability.
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Individual_Solid
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Re: The F-1 (aka "I Was Too Excited to Draft the UART Circui

Post by Individual_Solid »

BigDumbDinosaur wrote:
If you are going to use the AVR as the clock generator for the MPU make sure the AVR's rise/fall times are within the limits specified by WDC, which are currently 5ns. While the MPU will likely tolerate a slower rise/fall time, you probably should not bank on that. An out-of-spec clock can cause subtle errors that will be difficult to identify.

Also, you need to assure reasonable clock symmetry from the AVR if you are going to run your unit at double-digit speeds. It's only a slight exageration to say as Ø2 approaches the maximum (officially 14 MHz), clock symmetry becomes critical to achieving stability.
More o'scope practice to measure the rise/fall times of the Attiny? Sounds fun!

I'm not concerned about running this thing any faster than 8MHz, and even that would be a stretch.

Probably going to add the 6522 bitbanged I2C circuit from Garth's potpourri page, but put I2C power on CA2 so that I2C is all contained to one IO Port.

Wrapping up the rev B schematic now.
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