Propeller laptop - with a 6502 co-processor and 64K

[ChuckT]

http://www.parallax.com/tabid/708/Default.aspx

This is a new computer and it seems that it could use virtual hardware. I imagine you could build a computer with several 6502 processors. How fun...

[BigEd]

It's an interesting demonstration: a real 6502, a couple of tristate buffers, a 64k ram, all hooked up to a propeller acting as the central controller. The propeller has 32 i/os and runs 8 cores at 20 million instructions per second. He even uses the propeller to toggle the clock input, which means everything runs at variable speed.

I don't know what speed he can get up to when he has software emulating glue logic. I'd be surprised if it is much above 2MHz. The nice thing is he can manage bootstrapping from the propeller and the whole memory map is under software control - on a cycle by cycle basis.

On the other hand, one of the propellor cores is - probably - just powerful enough to emulate a 6502, perhaps in the 1-2MHz range. And there's 8 cores.

I think the propeller is the most extreme way to do glue logic: 74 series is simple and cheap but takes lots of wiring, CPLDs are a bit harder to get started with but very flexible. Propeller even more so.

[ElEctric_EyE]

This is the second time I've seen a post about this propeller chip. First time it looked abit confusing. Now it looks more intriguing, definately an $8 40 pin chip worth looking into. Very nice how it has built in video, and programmable by the PC USB port. Also, the data sheets and app notes given on parallax website is very informative.

[ChuckT]

They are working on a faster and larger propeller chip with more bytes addressed.

I am interested in it as well.

[BigEd]

ChuckT wrote:

(Dennis Ferron's 6502 laptop:) http://www.parallax.com/tabid/708/Default.aspx

There's a very interesting circuit trick in there. As far as I can tell, he's relying on the 6502 Data Bus not being driven during PHI1. So he's able to connect the address bus to the data bus with a couple of 74244's, and sample the data bus, in order to emulate any peripherals - there are no peripherals otherwise accessible to the 6502. (For a peripheral read, I suppose he drives the databus during PHI2, as normal.)

There's a hint of this and a click-to-enlarge circuit diagram on his blog.

Quote:

The reason I was able to do it with so few chips is a combination of the Propeller microcontroller's versatility, and a neat timing trick that allowed me to multiplex the data bus. After reading how old 6502 computers interleaved video access with processor accesses on the same bus, I realized I could use the same technique to allow the Propeller to access the bus in the interim period between each 6502 bus cycle. Since the 6502 puts the address out before the data is read or written, the Propeller can quickly transfer the 16 bit address onto the 8 bit data bus in two transfers, and still finish in time to return the data bus to a "normal" state so that the 6502 never knows anything happened.