Michael, that was my inspiration! I totally meant 'as previously demonstrated before by you'...

And thanks for starting this topic. I can't remember when I got my skinny RAMS (they were somehow in my warchest), but I it is likely because of your post.

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In theory, there is no difference between theory and practice. In practice, there is. ...Jan van de Snepscheut

Worth noting? The pinout for a 28C256 EEPROM is the same as that for a 32K RAM chip. If you separate the active lo chip enable pins it's relatively easy to 'stack' RAM & ROM to significantly reduce wiring or routing. For example, on a solderless breadboard project I used a 14-pin SIP machined pin header with the /CE pin cut off and a wire soldered onto the shoulder of that header pin in order to separate the /CE pins. The EEPROM is selected with the wire while the RAM is selected via the solderless breadboard connection.

Firstly, the suggestion to place narrow DIP RAM under wide DIP RAM is gratefully received and may be implemented in the near future. I considered SOIC/DIP combo or similar but DIP/DIP combo is of more general use to a greater number of hobbyists and, in particular, within my ability.

Secondly, I am alarmed that use of RAM socket as expansion socket is becoming popular while pin count and spacing becomes increasingly diverse. If you are designing a base board or expansion board, where possible and practical, please duplicate the right column of the DIP at 0.3 inch (narrow) and 0.6 inch (wide). (I recommend similar redundancy with 0.1 inch and 0.2 inch spacing for quartz crystal or ceramic resonator. This redundancy is particularly attractive because it requires a maximum of 0.01 square inch of board.)

On base boards, I recommend 0.2 inch physical clearance at top of 28 pin sockets and 0.3 inch clearance at right of narrow sockets. On expansion boards, I recommend jumper or similar to select power from pin 28 or pin 32 only.

Thirdly, do not buy one 28 pin or 32 pin narrow DIP socket when it is often cheaper or more convenient to purchase two 14 pin or 16 pin narrow DIP sockets. Admittedly, it is possible to place chip alignment markers in a contradictory manner. However, this poor practice may be rectified by applying percussive maintenance at source.

Finally, JEDEC is a bunch of clowns who should have kept power and ground 14 pins apart. JEDEC has caused particular strife by keeping power and ground as far apart as possible. Despite such idiocy, I would be surprised if JEDEC led a migration to narrow frames. I presume that the specialist frame stamping sub-contractors gained experience with the precision of surface mount frames and this allowed narrow DIP fan-out beyond 20 pins. This saves a smidgen of metal per unit. However, in the quantities produced, there is considerable advantage to reduce size while maintaining 0.1 inch pin spacing.

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