A multiprocessor system with mainly just the 6502 (?)

[Aloha6502]

LOL so after all that discussion, the bottom line is, at 20 MHz, sharing the bus is a no-go for the CPUs and so we need to look at just treating each "CPU unit" as a separate peripheral, connected via I/O and not the memory/address buses.

So that's good, we have that out of the way and can proceed to the next step, which I reckon means I need to dig around to think about how the video would work with a 6502 doing it. I think that's probably the most complicated aspect of this design, to not use ASICs. The other aspects (sound, keyboard input, printer output) would not be as complicated.

I haven't yet decided what exactly "video" means (i.e,, what is the display).

[Dr Jefyll]

Aloha6502 wrote:

LOL so after all that discussion, the bottom line is, at 20 MHz, sharing the bus is a no-go

Not sure how you ended up talking about 20 Mhz. Early in this thread you said, "It doesn't need to run super fast. That is to say, the multiprocessing is not for speed. It is for replacing ASIC dependency."

How many processors would be sharing? If it's only two, I expect you could get them both running at 5 MHz without too much trouble. And an experienced builder could achieve 10 Mhz or more.

-- Jeff

[GARTHWILSON]

Note that if you use dual-port RAM, you'll have a processor connected to each port, so if you want one processor to connect to more than one other processor, you'll need a dual-port RAM for each connection, and of course the address decoding to address each one separately. The dual-port RAMs can act like mail boxes; but in urgent cases you'll need a way for one processor to tell another to check the mailbox now instead of sometime down the road when it's convenient. That mostly means an interrupt.

"ASIC" stands for "application-specific IC," and generally means a custom IC, a very, very high-budget undertaking. What you might be thinking of is not an ASIC, but rather an FPGA (field-programmable gate array) or CPLD (complex programmable logic device), or even simpler, a PAL (programmable array logic). These are off-the-shelf devices that you program for your particular needs.

[GARTHWILSON]

Dr Jefyll wrote:

Not sure how you ended up talking about 20 MHz. Early in this thread you said, "It doesn't need to run super fast. That is to say, the multiprocessing is not for speed. It is for replacing ASIC dependency."

Yes, there seemed to be some incongruence there right from the beginning. Four coupled processors will not give you the computing power of one processor running at four times the speed and without ASICs.

[Aloha6502]

Dr Jefyll wrote:

Aloha6502 wrote:

LOL so after all that discussion, the bottom line is, at 20 MHz, sharing the bus is a no-go

Not sure how you ended up talking about 20 Mhz. Early in this thread you said, "It doesn't need to run super fast. That is to say, the multiprocessing is not for speed. It is for replacing ASIC dependency."

How many processors would be sharing? If it's only two, I expect you could get them both running at 5 MHz without too much trouble. And an experienced builder could achieve 10 Mhz or more.

-- Jeff

Ok, there are a few questions/queries which I will answer one by one. First, the speed. Yes, initially I said that I envision this computer "doesn't need to run super fast" but that doesn't mean it HAS to run slow. The speed thing came up after the two or three posts where I was surprised the 6502 could be clocked at 25.175MHz, which a few folks then explained the chips often were labeled at 50% possible speed, etc. and then there was mention "As an aside, production devices must pass testing at 20 MHz, which implies that 20 MHz performance can be relied upon."

So, that went into the whole thing where I asked about RAM and ROM speeds being able to match this 20 MHz clock.

I realize this is a casual discussion and not a formal "production design meeting" so the topics will be jumping around, but generally I am quite happy (and also very appreciative) of everyone helping me brainstorm. But there will be times where either myself or you folks get confused about the train of thought.

[Aloha6502]

GARTHWILSON wrote:

"ASIC" stands for "application-specific IC," and generally means a custom IC, a very, very high-budget undertaking. What you might be thinking of is not an ASIC, but rather an FPGA (field-programmable gate array) or CPLD (complex programmable logic device), or even simpler, a PAL (programmable array logic). These are off-the-shelf devices that you program for your particular needs.

For the reason behind me not wanting to use ASICs, is 1) the educational value as I mentioned, about trying to achieve various things with the 6502 only, having the chip not only act as the computer's main CPU, but also as a controller chip, and 2) the second being the ability for someone, not only myself, but someone in the future, to reconstruct such an 8-bit computer without relying on finding certain types of video chips, etc. The ASICs I have in mind are for example the ones used by the Atari 8-bit series, to drive video, sound, etc. (called ANTIC and POKEY).

I don't want to use FGPAs, etc. I actually have an experimentation FPGA board here from Diligent (the entry level BASYS 3 board) but I only want to use 6502s and maybe associated chips such as the 6522, for the above reason of repeatability and instructive value.

[Aloha6502]

GARTHWILSON wrote:

Note that if you use dual-port RAM, you'll have a processor connected to each port, so if you want one processor to connect to more than one other processor, you'll need a dual-port RAM for each connection, and of course the address decoding to address each one separately. The dual-port RAMs can act like mail boxes; but in urgent cases you'll need a way for one processor to tell another to check the mailbox now instead of sometime down the road when it's convenient. That mostly means an interrupt.

Thanks for the mention about dual-port RAM. I will investigate that too.

[Aloha6502]

GARTHWILSON wrote:

Dr Jefyll wrote:

Not sure how you ended up talking about 20 MHz. Early in this thread you said, "It doesn't need to run super fast. That is to say, the multiprocessing is not for speed. It is for replacing ASIC dependency."

Yes, there seemed to be some incongruence there right from the beginning. Four coupled processors will not give you the computing power of one processor running at four times the speed and without ASICs.

I think the idea of having more than one CPU coupled like that came from an earlier mention by someone how to achieve it, but also the TITLE of this discussion can be a little confusing, because it seems to imply the regular meaning of multiprocessing to achieve higher computation power, but as I mentioned in the beginning, the meaning of "multiprocessor" in the context of this discussion is the usage of multiple 6502s to do various tasks.

However if the main CPU(s) can be clocked faster, and maybe even have dual 6502s as the main processor unit, then why not. So that's where the idea about increasing the computation power of the main engine unit came from.

[plasmo]

Aloha6502 wrote:

I don't want to use FGPAs, etc. I actually have an experimentation FPGA board here from Diligent (the entry level BASYS 3 board) but I only want to use 6502s and maybe associated chips such as the 6522, for the above reason of repeatability and instructive value.

How fast you can run 65c02 is closely coupled to the complexity of supporting logic and the resulting capacitive loads, pc board size, and propagation delays. By using integrated logic (PLD, CPLD, FPGA), you have the best chance of making the smallest, least loaded design thus achieving the fastest operating speed.

The complexity of multiple processors also cause each processor to operate slower thus you need more processors to do what a simple, fast processor can do. Multiprocessor systems are interesting, but it takes many design iterations and insights to find that optimal tradeoff between complexity and performance.
Bill

[Aloha6502]

plasmo wrote:

Aloha6502 wrote:

I don't want to use FGPAs, etc. I actually have an experimentation FPGA board here from Diligent (the entry level BASYS 3 board) but I only want to use 6502s and maybe associated chips such as the 6522, for the above reason of repeatability and instructive value.

How fast you can run 65c02 is closely coupled to the complexity of supporting logic and the resulting capacitive loads, pc board size, and propagation delays. By using integrated logic (PLD, CPLD, FPGA), you have the best chance of making the smallest, least loaded design thus achieving the fastest operating speed.

The complexity of multiple processors also cause each processor to operate slower thus you need more processors to do what a simple, fast processor can do. Multiprocessor systems are interesting, but it takes many design iterations and insights to find that optimal tradeoff between complexity and performance.
Bill

Thanks for the insight. The exercise will be interesting. Let's see how it goes haha. I have a lot of reading on this topic to do first.

[BigEd]

It's notable that Commodore's early disk drives used a pair of 6502s, but then they consolidated the code into a single CPU. Once again, it's a software problem to arrange that a sufficiently fast CPU can juggle more than one task adequately well.

I'm going to ask a lazy question Aloha6502: what experience do you have in building microprocessor systems, and in programming them? It might be that you would be best advised to build up your practical knowledge by starting relatively simply.

[Aloha6502]

BigEd wrote:

It's notable that Commodore's early disk drives used a pair of 6502s, but then they consolidated the code into a single CPU. Once again, it's a software problem to arrange that a sufficiently fast CPU can juggle more than one task adequately well.

I'm going to ask a lazy question Aloha6502: what experience do you have in building microprocessor systems, and in programming them? It might be that you would be best advised to build up your practical knowledge by starting relatively simply.

Is not a lazy question. Ask away! The answer is NONE! Haha! I agree the usual way is to start small and build up but I have the kind of crazy brain that jumps into things and learns from all the wrong things I did. This is how I have been operating for ages. It has pros and cons, compared to what most other people might undertake. Having said that I am not entirely starting as a blank slate, but my experience doing this type of thing that we are discussing is effectively nil. Oh, programming is not nil but not at this low level. Well, I have done some 6502 assembly language before, but of course those computers were already built, and you just need to edit the memory locations for them to do things.

[floobydust]

Well, having no practical experience with designing and building a small system, nor much of any hands-on programming experience to make one boot from a CPU reset, I would tend to advise that you reset your expectations and start with getting a single CPU running on a breadboard... CPU, ROM, RAM, UART and some decode logic. You might find it more challenging than you think. Once that's done you can add something like a VIA (65C22). Once you have something up and running, you can build up a second breadboard and attempt to get them talking to each other... slow clock speeds would be most practical and having some decent test equipment a real plus.

Of course, this is just my $0.02.... but in any case, have fun doing the project and take small steps as you move forward.

[GARTHWILSON]

In that case, please go through the 6502 primer. It's 22 logically organized pages on the various aspects of making your own 6502 computer.

[Aloha6502]

Yup, all advice well taken. I understand what I am getting into. The primer is also on my list of things to re-read. So, lots of reading ahead.