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PostPosted: Wed May 05, 2021 11:06 pm 
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Hi. Has anyone ever designed a multiprocessor system using only the 6502 as the computing device for everything? That is, one 6502 dedicated to sound, one for video, one for running the main program, one for handling I/O, etc?

The idea I am thinking is just to have a system capable of doing all these tasks without having to use ASICs for things, and all the programming is done with 6502 assembly language, no need to rely on ASICs. The main 6502 would delegate tasks to the other 6502s which call the main 6502 with interrupts. If one 6502 is not enough then you can have two to handle the video, etc. The idea is just to use only 6502s.


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PostPosted: Thu May 06, 2021 2:43 am 
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See these two topics:
idea: a cell-like chip based on many 6502 cores
Parallel Processing with 6502s
They don't specifically address having a processor for video, one for audio, etc., but the idea could be applied.

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PostPosted: Thu May 06, 2021 2:50 am 
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GARTHWILSON wrote:
See these two topics:
idea: a cell-like chip based on many 6502 cores
Parallel Processing with 6502s
They don't specifically address having a processor for video, one for audio, etc., but the idea could be applied.


Thanks, will examine those. And thanks for your Primer too. Read that a while back.


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PostPosted: Thu May 06, 2021 2:59 am 
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And by the way, just to clarify, when I mention sound and video, I don't mean anything fancy. Just for human interface needs. Simple beeps and alerts or basic tones (it is arguable whether we allow usage of the 555 timer or keep it "purely 6502"). And the graphics can be either text only (with a few colors for highlights) or text and simple graphics. It would be mainly used for programming and interacting with programs.

Actually one of the harder things will be finding the relevant analog CRT-ish displays for this instead of modern HDMI screens (maybe using X/Y mode on CRT oscilloscopes? But that might potentially damage CRT scopes?) Just thinking out loud.

This multiprocessor machine would be sort of a step up from the AIM-65 types with only thermal paper and single line LED/LCD displays. It doesn't need to run super fast. That is to say, the multiprocessing is not for speed. It is for replacing ASIC dependency. It also has an educational value (at least to me) to do all the stuff using 6502 assembly language and pushing the experimentation of hardware signal timings down to individual cycles.


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PostPosted: Thu May 06, 2021 4:05 am 
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For mere beeps, you can set up a timer in the 6522 to free-run and to toggle PB7 on every time-out, meaning you can generate a square wave without having to babysit it. You just start it, and then come back later to stop it when the beep has run the desired length of time. There's no need for a 555. In fact, with the advent of CMOS logic with Schmitt-trigger inputs decades ago which are simpler to use than the 555, the need for 555's has dropped nearly out of sight.

The displays page of the 6502 primer shows intelligent character LCD modules which you only need to feed ASCII data and minor instructions and the LCD module will figure out which dots to turn black and how to put the characters in the right places, and it shows a graphic LCD interfaced by SPI, and has links to various tiny VGA adapters. These LCDs take care of the scanning, duty cycle, etc.. My simple raster graphics using an analog oscilloscope is shown at viewtopic.php?p=15348#p15348 . It uses a 6522 VIA, but this one needs constant babysitting from the processor; so I had thought about making a separate '02 computer to do that so the main computer is freed up to do other useful things. My idea is that the second computer would take in instructions and figure out which bits to set in it video memory, for text (including different sizes and maybe fonts), line segments, arcs, fills, etc., and keep feeding the data for the scanning.

I have envisioned (but never done anything about it) having my workbench computer able to do its own hosting, running its own programmer's text editor and file operations without that interfering with the realtime work I use it for, meaning that the human-interface part would need to be a separate computer even if it's on the same board with the one running processes on the workbench.

The links above show many of the things I've used the workbench computer for, doing what you're talking about without the ASIC dependency you speak of. The separate processors would however allow it to feed a raster display continuously while playing back a recording, handling other I/O in realtime, scanning a keyboard and handling the debouncing and delay-before-repeat and the auto-repeat, etc.. It does all of these things with a single processor and without programmable logic or ASICs; but to do them all at once, at the same speed, without affecting each other's timings, would require more processors (or just kick the clock speed into the rafters).

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PostPosted: Thu May 06, 2021 7:21 am 
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Ok thanks for the info.


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PostPosted: Thu May 06, 2021 7:46 am 
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It was not unusual for arcade video games to have multiple processors, and I have a feeling at least one used a 6502 for sound. (For example, the family of games built on Atari System II use a 6502 for sound.)

And it was not unusual to have a micro to perform disk I/O: from the PET onwards, Commodore put a 6502 in the disk drive, and initially they actually put two in: one for low level and the other for high level actions. Most other cases, I think, used a Z80 for I/O but the principle is the same.

Acorn's BBC Micro was conceived as a 6502 front end and a second processor to run the application. The first second processors were a 6502 model and a Z80 model. (Eventually there were 32 bit second processors.)


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PostPosted: Thu May 06, 2021 8:03 am 
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Aloha6502 wrote:
Hi. Has anyone ever designed a multiprocessor system using only the 6502 as the computing device for everything? That is, one 6502 dedicated to sound, one for video, one for running the main program, one for handling I/O, etc?

If I were going to do such a thing, I'd focus on WDC's 65C02, which has the MLB (memory lock) output. At some point, resources would need to be shared in some way to allow the MPU running the system to give the MPU running the sound some instructions. Ditto for the MPU running the video. The MLB outputs would be useful for telling the "slave" MPUs when the "master" MPU (the one actually executing program code) is busy with a shared resource, e.g., RAM common to all MPUs.

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PostPosted: Thu May 06, 2021 8:21 am 
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For me, the biggest challenge wouldn't be in programming multiple 6502s to divide the labor to provide a suitable user experience, but rather how to get them to communicate cheaply and efficiently with one another. Yin-Yang clocking? Dual-port RAM? DMA? Byte-wide message passing? Private/public memory-mapped segments? My hardware chops would need significant improvement before I could imagine attempting any of them ...

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PostPosted: Thu May 06, 2021 9:01 am 
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I expect that the easier hardware solution would be to have the various computers connected only loosely through I/O, probably by synchronous-serial links, not trying to access the same bus and same memory. You would not need special clocking, or DMA, or dual-port RAM, or complicated bus management. Then you could have a mesh with each processor communicating with several around it.

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What's an additional VIA among friends, anyhow?


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PostPosted: Thu May 06, 2021 9:38 am 
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GARTHWILSON wrote:
I expect that the easier hardware solution would be to have the various computers connected only loosely through I/O, probably by synchronous-serial links, not trying to access the same bus and same memory. You would not need special clocking, or DMA, or dual-port RAM, or complicated bus management. Then you could have a mesh with each processor communicating with several around it.

Synchronous-serial would probably be too slow for I/O and video. A synchronous parallel bus arrangement using some VIAs might be more effective. Eight bits would be employed to pass data between MPUs, some bits would be used for clocking and some other bits could be used for selecting the slave MPU that is to respond and to indicate the transfer direction.

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PostPosted: Thu May 06, 2021 11:01 am 
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I've also toyed with the idea of building a multiple processor based system... separate subsystems to handle various I/O (filesystem, text/graphic system, user entry (keyboard), etc., along with a main processor board that coordinates the rest.

For communication between them, I was thinking along the lines of serial, but at high speed (230.4Kb). Each subsystem would have a DUART on board, and could use one channel for sending and receiving commands and data. The basic idea is to have a continuous packet of data (sorta like the old iBM token-ring) where each subsystem can get commands and data and update their part of the packet with status and data. This would result in a constant amount of CPU bandwidth (overhead) to keep all of the subsystems in sync, so to speak.

Of course, one might think this is too slow for doing video, but it all depends. Back in the mid 80's we (IBM) released the Professional Graphics Adapter... a large two-slot card that had it's own processor, ROM, lots of RAM (at least at the time) and the onboard firmware provided a rich set of graphic drawing functions along with flexible text capabilities. Implementing something like this could reduce the amount of command and data that needs to be sent to the video subsystem perhaps.

Then again, I don't currently have any hard plans on building this... too many irons in the fire right now, so my 8-bit time is limited, but I do think it's an interesting project to work on.

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PostPosted: Thu May 06, 2021 11:22 am 
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A VIA is a ready made way to have a couple of byte-wide ports with handshaking. But two other approaches spring to mind: simple octal TTL devices for simple byte-wide ports on the one hand, and FIFOs on the other.

Coordinating the tasks of the various subsystems needs to be right - you could lose a lot of time debugging that. It's much easier if the flow of data is unidirectional. For example, if the keyboard CPU only produces keystrokes (and doesn't need to be told to light LEDs), and if the graphics CPU only produces video (and is not queried for what's in the buffer or where the cursor is.)


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PostPosted: Thu May 06, 2021 11:45 am 
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BigEd wrote:
A VIA is a ready made way to have a couple of byte-wide ports with handshaking. But two other approaches spring to mind: simple octal TTL devices for simple byte-wide ports on the one hand, and FIFOs on the other.

True that. However, bi-directional data flow will be required from the I/O subsystem. I'd think a VIA would be better suited to that task than TTL-type transceivers and buffers.

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PostPosted: Thu May 06, 2021 12:59 pm 
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Aloha6502 wrote:
Hi. Has anyone ever designed a multiprocessor system using only the 6502 as the computing device for everything? That is, one 6502 dedicated to sound, one for video, one for running the main program, one for handling I/O, etc?

The idea I am thinking is just to have a system capable of doing all these tasks without having to use ASICs for things, and all the programming is done with 6502 assembly language, no need to rely on ASICs. The main 6502 would delegate tasks to the other 6502s which call the main 6502 with interrupts. If one 6502 is not enough then you can have two to handle the video, etc. The idea is just to use only 6502s.


The key to this is inter-processor communication... and has been discussed here in the past and there are real-life examples - My favourite BBC Micro and its Tube interface - the Commodore PET (and derivatives) with it's IEEE link to the disk drives with their own CPU and possibly many others.

Non 6502 systems I've worked on in the past have had high speed (for the time) serial links and/or shared memory systems.

The BBC Micro Tube is a FIFO (or set of FIFOs) but to make that in a compact way today would need an FPGA, but a shared memory interface using small size dual-port RAM is do-able - with good address decoding then perhaps a 256 byte RAM region per peripheral is usable - the host CPU would write data, then send a signal to the peripheral which can then read the data and send a signal back to the host to say "done". (Signal being a byte in the shared RAM or interrupt).

The VIA solution is also a possibility but one VIA per peripheral.

Either way might work on a bus system - with the bus exposed to each peripheral which carries it's own shared RAM IC or VIA. If the video interface was high level then all you might need to send over the communication system might be simple commands like "print character", "draw line from x1,y1 to x2,y2" and so on. This is similar in principle to the TI Video chip of the era and pretty much how the BBC Micro does it.

My own Ruby project uses a mutually exclusive shared RAM system so the 'host' CPU (not 6502) does the serial, disk, 'video', with the user code running on the 6502/816. The video is done via high level commands send via the 'serial' interface to a 'smart' video terminal - which could be another 6502 system (e.g. BBC Micro) or (in reality, right now) an SDL application running on my Linux desktop.

-Gordon

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