BigEd wrote:
There are 6502 variants which have a prefix byte, but not for this purpose.
Not exactly a variant -- it's a hand-built one-off!
-- but my 1988
KK Computer defines opcodes $43, $83 and $C3 as prefix bytes.
KK is a 'C02 superset that has long addressing (24-bit) baked into the instruction set. The penalty for using 24-bit addressing (as compared to 16-bit) varies from slight to none, making KK comparable to the '816 in that respect. I'll explain the prefix bytes.
As a point of reference, recall that the '816 uses...
- register PBR to supply 8 bits that're prepended to addresses for code accesses
- register DBR to supply 8 bits that're prepended to addresses for data accesses
The KK Computer uses...
- register K0 to supply 8 bits that're prepended to addresses for code accesses
- register K1 to supply 8 bits that're prepended to addresses for data accesses
- register K2 to supply 8 bits that're prepended to addresses for data accesses
- register K3 to supply 8 bits that're prepended to addresses for data accesses
... and that's the purpose for KK's prefixes. They are one of the two ways to engage
K1,
K2 and
K3. $83 is a one-byte, one-cycle prefix which causes the following instruction (example: LDA CMP ADC ASL etc) to apply
K1 during its final cycle (the data access). Similarly, prefix $43 will engage
K3 and prefix $C3 will engage
K2. (The default for data accesses is
K0.)
BigEd wrote:
one way in which it works well is when the prefixed instructions are rare or slow.
Yes, exactly -- there are two tiers implied. And the non-prefixed tier, while faster, constrains you to the limited number of opcodes which are not already defined.
The tradeoff I selected for KK devotes six of the precious, non-prefixed opcodes as follows. Simple inter-bank peeks and pokes are allowed to proceed without the one-byte, one-cycle prefix penalty.
- LDA using absolute mode and with 8 bits prepended from K2
- STA using absolute mode and with 8 bits prepended from K1
- LDA using (X,ind) mode and with 8 bits prepended from K2
- STA using (X,ind) mode and with 8 bits prepended from K1
- LDA using (ind),Y mode and with 8 bits prepended from K2
- STA using (ind),Y mode and with 8 bits prepended from K1
A list of all 44 new instructions is
here. And I'm slightly OT, so if you care to comment please consider doing so here:
6502 Forth with hardware accelerator.
-- Jeff
_________________
In 1988 my 65C02 got six new registers and 44 new full-speed instructions!
https://laughtonelectronics.com/Arcana/ ... mmary.html