Welcome, Nick!
I see lots of logic chips which are labeled as being HCT series. Is this just a default notation supplied by the schematic software, or do you actually intend to use HCT? Based on a quick scan of the drawing, I notice only one chip (the '245 transceiver) that'll experience less than rail-to-rail swings at its inputs and will thus require one of the "T" variant families such as HCT. (And BTW for the transceiver I'd consider an '
AHCT245 rather than 'HCT245.)
As you may be aware, most (all?) of the other glue can use a non-T variant such as HC. (T variants will
work but T series inputs have somewhat less noise margin than non-T. For hobby applications it's probably not enough to matter. But, other things being equal, I suggest you avoid T series except where it's necessary.)
This part (below) is probably alright, but as noted I'd switch the HCT to HC. Or, for the NAND's, I'd consider using 'AHC. It's important that the /WR signal not be unduly delayed, and AHC series logic is faster than HC (AC too is faster but with AC certain precautions apply).
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Re the LED's (below), I guess you know you could save at least one inverter. The cpu's E output is strong enough to drive the LED directly, and the RXD signal could use just a single inverter. In each case the LED would need its other lead moved from Vcc to Gnd. And of course none of this matters if you have lots of extra inverters available.
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Finally, I see the 8 MHz clock oscillator connects directly to the '816 clock input. Is the osc capable of providing fast the rise & fall times which the '816 clock input prefers? I'd consider using an AC or AHC series gate as a buffer between the osc and the cpu clock input.
Sorry not to have any more substantial comments, for example on subjects such as address decoding and others. Your schematic is drawn more or less as a net list, and I'm one of the folks who find that a real impediment. The choice is up to you, of course. But IMO it's a write-only approach, unfriendly to those trying to
read the schematic. In future could you maybe at least separate the address, data and control buses? Cheers,
Jeff
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