First Build and ATF22V10

[Firefox6502]

Hi Guys,

I've spent the last 3 weeks reading up heaps on 65C02 and related chips. These include the 6502 primer (http://wilsonminesco.com/6502primer/), and 2 books, "Microprocessors and Microcomputers" 3rd by Tocci/Laskowski, and "Programming & Interfacing The 6502 With Experiments" by De Jong. (I'm so thankful that I kept these old books from my studies!!!)

I feel I now have a somewhat basic understanding on building a SBC.

I've been looking into Daryl Rictor's SBC-2 (https://sbc.rictor.org/info2.html). I really like that fact that it's all DIP chips and the memory space for the ROM is 32KB and RAM is 32KB (mostly). I've finally understood how Daryl's address decoding works using 74 series chips. I was planning on following this until yesterday I came across this post: viewtopic.php?f=12&t=6321 where some others are using PLDs like the ATF22V10CQZ.

I'm all for using less chips for obvious reasons - cost, reducing propagation delay, and less things may go wrong.

Questions
1. Is there a schematic out there for a 65C02 using a ATF22V10 (or similar chip) for address decoding?
Now, my electronics background is very very rusty. Last I studied was in '91. After this I continued my studies in Comp Sci, and have been developing in high-level languages since then - 30 years or so. I will read the PLD's datasheet but very much still need my handheld all the way, as this is my first build.


2. Which PLD chip to use?
Looking into this particular PLD, I noticed a few versions at au.mouser (I am in Australia). I've selected the following two, the aforementioned one in the post, and the fastest one:

ATF22V10CQZ-20PU
https://au.mouser.com/ProductDetail/?qs ... flfg%3D%3D
Maximum Operating Frequency: 50MHz
Propagation Delay - Max: 20ns

ATF22V10C-7PX
https://au.mouser.com/ProductDetail/?qs ... LCgQ%3D%3D
Maximum Operating Frequency: 166MHz
Propagation Delay - Max: 7.5ns

For the first version of my SBC, I plan to run it at 1MHz. After this, I will read up on techniques on how upgrade it incrementally to a faster clock, 6MHz, then 10MHz, and finally 14MHz.
So planning for this, I'd rather buy the fastest components now (for SRAM and whatever else). Therefore would the ATF22V10C-7PX chip be a good choice as this wasn't mentioned in the post, and the ATF22V10CQZ-20PU chip was mentioned?

Thank you everyone!

Cheers
Peter

[8BIT]

Hello Peter,

For an example of a simple SBC with a GAL memory decoder, you can look here: https://sbc.rictor.org/decoder.html

The Atmel GALs - ATF22V10 - require s programmer that supports it. Others here might be able to recommend one, or you could search the forums for what others are using. My cheap Genius NSP does not program the Atmel parts. Lattice stopped making their GALs, which were more universal in being programmed.

Good luck with your project. Starting small and growing features is a good way to go.

Daryl

[BigDumbDinosaur]

Firefox6502 wrote:

I've been looking into Daryl Rictor's SBC-2...I was planning on following this until yesterday I came across this post: viewtopic.php?f=12&t=6321 where some others are using PLDs like the ATF22V10CQZ.

As Daryl noted, Microchip (formerly Atmel) GALs use an idiosyncratic programming algorithm that is not supported by most chip burners. You may be able to get some NOS or used Lattice product from eBay sources, but as usual, beware of counterfeits.

Quote:

I'm all for using less chips for obvious reasons - cost, reducing propagation delay, and less things may go wrong.

My POC V1.2 unit runs at 20 MHz using discrete logic and has enough timing headroom to go somewhat faster (although the 65C816 can't). Disclaimer: wait-stating is used on ROM and I/O accesses—that would have been the case if I had gone the GAL or CPLD route. Clearly, prop delay can be controlled with proper circuit design.

As for cost, individual gates are inexpensive. If you go the PLD (GAL) route you have to consider the cost of the device programmer as part of the cost to build your machine.

Regarding things that can go wrong, outright design errors will be the most likely cause, whether using discrete or programmable logic. Of course, fixing design errors with a PLD is easier than with discrete logic. In the former case, you edit your source file. In the latter, you get out the flush cutters, soldering iron and bodge wire.

Quote:

2. Which PLD chip to use?
Looking into this particular PLD, I noticed a few versions at au.mouser (I am in Australia). I've selected the following two, the aforementioned one in the post, and the fastest one...

You might be better off going with a small CPLD, such as Microchip's ATF1504AS, which is available in a PLCC-44 package. You get more I/O pins and more logic features, more macrocells, and a simpler and less expensive method of programming the device using JTAG.

Quote:

For the first version of my SBC, I plan to run it at 1MHz. After this, I will read up on techniques on how upgrade it incrementally to a faster clock, 6MHz, then 10MHz, and finally 14MHz. So planning for this, I'd rather buy the fastest components now (for SRAM and whatever else).

Any PLD that is 15ns or faster will work with the 65C02 running at maximum official speed. As for SRAM, I have used this product in my POC builds (I ground A16, since I only use the first 64KB).

However, attaining high-speed performance involves more than just selecting fast parts. The physical layout of your machine and the construction methods used become important, something that has been widely discussed around here.

[Firefox6502]

Thanks guys for all the info! I will be re-reading all this many time while researching each point - another week or two R&D easy.

I'm sure I'll go with a PLD for address decoding, but I wonder what the research on parts and the programmer will reveal, i.e. cost and availability in 2021. As I did notice PLD programmers were going back a few years, or a decade or more. I'll post my findings.

Daryl, thanks for your design on the SBC-2 and the Memory Decoder. I plan to base my SBC on your SBC-2 design, which ever way I go: PLD or discrete.

[plasmo]

BDD mentioned CPLD such as ATF1504AS. I know many think CPLD, a 1990's technology, is too "modern" for retro computing, but if you'll consider it as an acceptable component, I can point out several advantages for using CPLD: Caution, I'm new to 6502 with only a couple successful 6502 designs, so you may want to take my opinions with a grain of salt.
* Ease of experimentation. The internal logic fabric can easily be changed for different designs or to correct design mistakes.
* Integration of design. You can have a small ROM, serial port, I2C, decoding logic all in a modest CPLD thus achieving a small SBC and reduce overall cost.
* Wide selection of logic gates with uniform propogation delay. Your design is not constrained by the availability of TTL logic and additional propagation delays cause by cascaded logic. Most combinatorial logic can be minimized to 2-level AND-OR representation by the design software. 14MHz operation is easily achievable. I'm currently experimenting with overclocking the same CPLD design to 24MHz.
* in-situ programmability. CPLD can be re-programmed without removing from the board, I used this feature extensively during hardware development.
* Cost of programmer: if you use Atmel's ATF150x, yes, the official programmer is rather expensive, about $60. However, if you use Altera EPM7xxx which is equivalent to ATF150x and existed prior to ATF150x, Altera programmers are widely cloned and available for about $5. Altera EPM7xxx does suffered from fake part problem in the grey market like eBay. I bought mine from UTSource which is less problematic.
* Common design tools for CPLD are WinCUPL and Quartus, both are free download. I see most people use WinCUPL for CPLD design which, IMHO, is "stone&chisel" tools (again refer to my caution about taking with a grain of salt); I design with Altera Quartus in schematic form, it may not be the modern VHDL/Verilog design entry, but sure beats the heck out of the "stone&chisel" approach.

[Druzyek]

I've had no problem programming Atmel GALs with this programmer: https://www.amazon.com/tl866ii-plus/s?k=tl866ii+plus

If you do decide to go this route instead of using a CPLD, you can also use an ATF16V8C, which is smaller and has less pins than an ATF22V10 but probably more than enough for a simple design. The programmer also programs EEPROMs as well as some odder stuff you may eventually want like OTP EPROMs that require high voltage.

[drogon]

Firefox6502 wrote:

Questions
1. Is there a schematic out there for a 65C02 using a ATF22V10 (or similar chip) for address decoding?
Now, my electronics background is very very rusty. Last I studied was in '91. After this I continued my studies in Comp Sci, and have been developing in high-level languages since then - 30 years or so. I will read the PLD's datasheet but very much still need my handheld all the way, as this is my first build.

My Ruby 65c02 and 65c816 uses GALs - One in the 6502, 2 in the 65816 boards. Both boards run OK at 16Mhz without taking any special precautions. I've not published schematics, but it's really trivial - in the 6502 one, the GAL does 3 things; (1) to qualify R/W with ph2 to generate RAM /Rd and /Wr signals, (2) to genrate /CS signals for each of the 2 x 32KB RAM chips and (3) takes the top 8 address lines and decodes a single 256 byte region for IO at $FExx. This goes to a single VIA. There is no ROM, no wait states, nothing complicated - bootstrapping is handled by an ATmega1284 microcontroller.

It's a 6-chip system: ATmega, 6502, 6522, 2 x RAM, GAL. 2 oscillators and a handful of resistors and decoupling caps and some LEDs.

Quote:

2. Which PLD chip to use?
Looking into this particular PLD, I noticed a few versions at au.mouser (I am in Australia). I've selected the following two, the aforementioned one in the post, and the fastest one:

I bought some ATF22v10 ones then found out that my cheap Chinese programmer lied about being able to program them (so double check yours!), so I bought some Lattice 22v10's from a Chinese chip reclaimer. I've not had any issues with them - they're obvious board pulls - very clean, but they have been programmed at least once. I didn't even try to see if they contained anything, just blanked then programmed them all with a test pattern and was happy.

-Gordon

[floobydust]

Like Drogon,

My C02 Pocket SBC uses an ATF22V10 PLD, the CQZ version. It acts as a single glue chip... qualifies /RD and /WR signals for memory and I/O, provides chip select signals for the RAM and ROM, but mine also provides 5- I/O selects that are 32-bytes wide each. You can find the schematics, PCB layouts, BOM and full code (BIOS, Monitor and PLD code for the 22V10) on my Github page.

Granted, the ATF1502 provides greater function and flexibility, but if you have the ability to program the Atmel PLDs, then it certainly makes a easy first build. Best of luck in moving forward.

[BigDumbDinosaur]

floobydust wrote:

Like Drogon,

My C02 Pocket SBC uses an ATF22V10 PLD, the CQZ version. It acts as a single glue chip... qualifies /RD and /WR signals for memory and I/O, provides chip select signals for the RAM and ROM, but mine also provides 5- I/O selects that are 32-bytes wide each. You can find the schematics, PCB layouts, BOM and full code (BIOS, Monitor and PLD code for the 22V10) on my Github page.

Granted, the ATF1502 provides greater function and flexibility, but if you have the ability to program the Atmel PLDs, then it certainly makes a easy first build. Best of luck in moving forward.

What did you use to program the GAL?

[floobydust]

I have a Dataman 40Pro... not a cheap programmer by any means, but they still provide frequent software updates. I've had this unit for about 7 years now.... and it's been faultless for everything I've done with it... granted, mostly EPROMs and EEPROMs, some old, some new... plus the Atmel ATF22V10, ATF16V8 and ATF750 (which requires a 0.1uF bypass cap on the power pins).

[Firefox6502]

plasmo wrote:

BDD mentioned CPLD such as ATF1504AS. I know many think CPLD, a 1990's technology, is too "modern" for retro computing, but if you'll consider it as an acceptable component, I can point out several advantages for using CPLD: Caution, I'm new to 6502 with only a couple successful 6502 designs, so you may want to take my opinions with a grain of salt.
* Ease of experimentation. The internal logic fabric can easily be changed for different designs or to correct design mistakes.
* Integration of design. You can have a small ROM, serial port, I2C, decoding logic all in a modest CPLD thus achieving a small SBC and reduce overall cost.
* Wide selection of logic gates with uniform propogation delay. Your design is not constrained by the availability of TTL logic and additional propagation delays cause by cascaded logic. Most combinatorial logic can be minimized to 2-level AND-OR representation by the design software. 14MHz operation is easily achievable. I'm currently experimenting with overclocking the same CPLD design to 24MHz.
* in-situ programmability. CPLD can be re-programmed without removing from the board, I used this feature extensively during hardware development.
* Cost of programmer: if you use Atmel's ATF150x, yes, the official programmer is rather expensive, about $60. However, if you use Altera EPM7xxx which is equivalent to ATF150x and existed prior to ATF150x, Altera programmers are widely cloned and available for about $5. Altera EPM7xxx does suffered from fake part problem in the grey market like eBay. I bought mine from UTSource which is less problematic.
* Common design tools for CPLD are WinCUPL and Quartus, both are free download. I see most people use WinCUPL for CPLD design which, IMHO, is "stone&chisel" tools (again refer to my caution about taking with a grain of salt); I design with Altera Quartus in schematic form, it may not be the modern VHDL/Verilog design entry, but sure beats the heck out of the "stone&chisel" approach.

Thank you very much for your concise and gentle description on CPLDs. I hadn't heard of this.

When CPLD was first mentioned, I looked it up and immediately recognised it as a modern component, then dismissed it. Your assumption of me rejecting it was spot-on! LOL
Now that I've re-read the advantages to using CPLDs, I would definitely consider it for a future SBC.

I'd like my current SBC to be 'retro', simple and straight-forwards as possible. My electronics is very rusty (30 years of very little tinkering), and I'm learning during the R&D and build.
My goal is to learn how computers work at a low-level (and it's related electronics components) then do a few years of assembly language programming (my favourite topic).
From there who knows... SMD components perhaps?

[Firefox6502]

Druzyek wrote:

I've had no problem programming Atmel GALs with this programmer: https://www.amazon.com/tl866ii-plus/s?k=tl866ii+plus

If you do decide to go this route instead of using a CPLD, you can also use an ATF16V8C, which is smaller and has less pins than an ATF22V10 but probably more than enough for a simple design. The programmer also programs EEPROMs as well as some odder stuff you may eventually want like OTP EPROMs that require high voltage.

AWESOME! If it can do any Atmel GAL chip (ATF16V8C or ATF22V10 - don't mind which) and some EEPROMs (like the 28256) then I'd totally buy it!
Reading up, seeing what it can do... Thanks!

[Firefox6502]

drogon wrote:

My Ruby 65c02 and 65c816 uses GALs - One in the 6502, 2 in the 65816 boards. Both boards run OK at 16Mhz without taking any special precautions. I've not published schematics, but it's really trivial - in the 6502 one, the GAL does 3 things; (1) to qualify R/W with ph2 to generate RAM /Rd and /Wr signals, (2) to genrate /CS signals for each of the 2 x 32KB RAM chips and (3) takes the top 8 address lines and decodes a single 256 byte region for IO at $FExx. This goes to a single VIA. There is no ROM, no wait states, nothing complicated - bootstrapping is handled by an ATmega1284 microcontroller.

It's a 6-chip system: ATmega, 6502, 6522, 2 x RAM, GAL. 2 oscillators and a handful of resistors and decoupling caps and some LEDs.
-Gordon

Quote:

Thanks heaps Gordon! With Daryl's Memory Decoder cct and your info here, I should have enough to understand what to do. Thanks.

[Firefox6502]

floobydust wrote:

Like Drogon,

My C02 Pocket SBC uses an ATF22V10 PLD, the CQZ version. It acts as a single glue chip... qualifies /RD and /WR signals for memory and I/O, provides chip select signals for the RAM and ROM, but mine also provides 5- I/O selects that are 32-bytes wide each. You can find the schematics, PCB layouts, BOM and full code (BIOS, Monitor and PLD code for the 22V10) on my Github page.

Granted, the ATF1502 provides greater function and flexibility, but if you have the ability to program the Atmel PLDs, then it certainly makes a easy first build. Best of luck in moving forward.

I'm definitely looking into this. Thanks heaps!

[Firefox6502]

floobydust wrote:

I have a Dataman 40Pro... not a cheap programmer by any means, but they still provide frequent software updates. I've had this unit for about 7 years now.... and it's been faultless for everything I've done with it... granted, mostly EPROMs and EEPROMs, some old, some new... plus the Atmel ATF22V10, ATF16V8 and ATF750 (which requires a 0.1uF bypass cap on the power pins).

Thanks. I'll be definitely reading up on this programmer! I don't mind paying more if it's reliable and works (which it sounds like it is). Having a great tool is one less thing to worry about. Thanks.