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For starters, there's no less than four times as many traces to place and route. That means increased board-related expenses, and really, THAT ultimately is what determines product price.
- soldermask (and what kind)
legend (and whether it's on one side or both)
controlled impedances
burried capacitance
blind and/or burried vias
secondary operations (like milling a slot, or drilling a hole after the others are thru-plated)
gold plating on contacts
bare-board testing at the board house
The number of traces does not affect the cost directly. If you need more layers to get it all in, or use super-narrow trace and space (like .002"!), then the price increases, but OTOH, these may result in decreased board size for a given complexity too.
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4. You don't need to reload all 32-bits of an address bus. What are the odds that you will even use half of that address space?
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Remember, the original 68000 was limited to 16MB, and the 68008 to 1MB. Lots of useful systems were built with both, each with significantly less than their complete memory capacity installed.
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since you have the load the buggers each time.
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By all accounts, WDC has only one significant customer, Winbond. And, by significant, I mean, if Winbond stopped using the 65xx lineup tomorrow, WDC would find themselves desperately seeking new clientele to keep cash flow, or risk burning cash reserves.
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Overall, if you're looking for anything resembling performance, you'll want either a discrete component CPU (using actual TTL parts) or an FPGA solution.
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However, you might want to consider building a stack-architecture CPU if you go this route. I think you'll find Phil Koopman's text on the subject, "Stack Computers: The New Wave" (http://www.ece.cmu.edu/~koopman/stack_c ... index.html) most interesting.
(Edited 6/25/12 to add link to math tables web pages)