Hi, i'm trying to run a 6502 on sega saturn, my first test is on a tetris arcade game.
I've tested some 6502 core but it's always too slow, so i took the fastest i've found and tried to tweak it a bit :

- use computed goto
- removal of wait for irq (or something like that)
- includes lookup tables from K5602
- read/write functions rewrote

There was huge speed increase from 19 to 43 (target is 60 fps) but it's not enough.
"my" 6502 is here :

https://github.com/vbt1/fba_saturn/tree/master/m6502

i'd like some comments about this core (what's good/what's bad)
do you have some advices to improve speed and keep compatibility :
- speed hacks
- common hints
- slow opcode that need asm
- whatever idea

for now i've tried everything i could, i lack of clues to improve this core.
Feel free to answer my post, depending on this C core i'll try to run or not NES emulation on saturn

Welcome! I don't know anything about the Saturn's SH2 CPU or the quality of the C compiler, so I can't say much about what performance you might hope for.

I'll take a look at the m6502 you're using - that's a new one for me. I'll add it to the reference section too.
(Do you have an upstream link for the source?)

However, I'd suggest you take a look at Ian Piumarta's lib6502, as that has always looked good to me. There's a slightly enhanced fork here:
https://github.com/ZornsLemma/lib6502-sf
and the original is here:
https://www.piumarta.com/software/lib6502/

This looks really cool!

I see you use static inline in some places. Have you looked at the assembly output to make sure it's actually inlined? Sometimes the compiler ignores it.

Probably not affecting your speed much but why does BRA take a condition code?

If you have the extra space, you could try making a copy of your dispatch loop on line 201 at the end of every op code function. That way you have one jump per instruction instead of two and (hopefully) only get one pipeline stall instead of two.

i dream of 20-25% more speed

only this one on github

Not yet, i'll check it ! thanks !

i didn't check asm, i can just say the code is bigger and faster, i tried with and without. so i would say it's inlined.

it's reused in multiple opcodes (bra,bcc,beq,etc)

yes i have extra space, it try this !

Probably a silly question, but are your compiler flags set to optimize for speed?

One thing you could consider if you have the ram is translating the machine code from 6502 to SH2 as the program executes. There's no way to reliably convert a whole program at once since you can't tell what's code and what's data, but you could monitor the program counter and convert instructions at addresses that have been executed at least once. Then just watch out for self modifying code which I imagine is less common on the NES.

This might be of interest
https://github.com/Xenomega/NESgen
Static Recompilation of NES ROMs to C code

and maybe
Static recompilation of 6502 machine code from NES ROMs
viewtopic.php?f=2&t=2541

and this post with links
viewtopic.php?p=43049#p43049

maybe see also
A very fast BBC Micro emulator.
https://github.com/scarybeasts/beebjit

it's optimized as -O2, -O3 gives bad results.
i have 1mb (a bit less) to do static recompilation, if it's enough, i can try

vbt, where did you get the copyright message you have in your files on github?

(Just to calibrate expectations: the Saturn has a pair of 28MHz SH2 processers, which are 32 bit RISC with 16 registers. The NES runs at 1.79MHz, and an emulator will need to emulate not only the CPU but also the PPU and APU, and any graphics format conversion. I suspect this will be pretty tricky!)

Most are from the original FBA (final burn alpha), it no more exists and became FBNeo)

For me it's possible, i did already full speed master system emulator, z80 runs well, so why not 6502

Depends how you compare the performance. A Z80 instruction takes between 4 and 23 clock cycles so executes fewer instructions per second (on average) than a 6502 (2 to 7 cycles/op) but many of those operate on 16-bit values which makes it more efficient than a 6502 at some tasks.

This is why a 2MHz 6502 can out perform a 4Mhz Z80.

_________________
Andrew Jacobs
6502 & PIC Stuff - http://www.obelisk.me.uk/
Cross-Platform 6502/65C02/65816 Macro Assembler - http://www.obelisk.me.uk/dev65/
Open Source Projects - https://github.com/andrew-jacobs

It will certainly be interesting to see progress! Those 6502 system simulators which aim to be cycle accurate are somewhat more expensive to run, so there's also that question: how accurate do you need to be, or choose to be. For example, running a scanline worth of instructions and then catching up with the I/O is a lot less expensive, I think.

I will steal this for my own projects if you have no objections.

Looks like the Sega Master System had a 4MHz Z80, so it's in the same ballpark! I recently looked into the SH4 variant that comes in a calculator I bought a few weeks ago, which is a descendant of the SH2. Single cycle instructions on 32 bit registers should be really fast!

Edit: I think we need a catch-all topic for license discussions: here's one. That replaces the comment I was about to make.