So I've been pondering how to go about wiring up an ISA card for a 65c816 CPU card for use on the ISA bus. I'd like to make use of the entire 24 bit address range and a latch for the higher data bits. My question is how to get an accurate spec to work with for the bus so I can determine how best to marry these odd parts.

Do you know that Apple offered the "Apple LocalTalk PC Card" in 1986? This ISA board is designed with a 65C02 @2MHz, SRAM, ROM, and a Z8530 SCC.

I am aware now!

I'm curious - are you using something like a passive ISA backplane just as a bus to make a 65c816 system, or are you looking to plug an '816 bard into an existing "live" PC, so that the PC can talk to the '816?

If using the 16-bit ISA slot variant, then I'm sure you're aware that the '816 only has an 8-bit data bus, so while it will fill the address bus it won't be able to access 16-bit wide peripherals, etc.

So if it's the former, then things like the 24-bit address latching is well solved and really a non-issue these days. You can use the reference circuit published in the data sheet, or (like me) use a GAL, or even a CPLD type device (which others have used). Alternatively the 65C265 does it all for you inside.

You'll need to work out a way to activate the IO signals to emulate an x86 peripheral if that's the plan though (e.g. taking to a sound card?)

If the other way - ie. as a peripheral card to a live x86 system then ... I really wouldn't know where to start....

Sounds interesting though - any more details, or just thinking out loud at this point?

Cheers,

-Gordon

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Gordon Henderson.
See my Ruby 6502 and 65816 SBC projects here: https://projects.drogon.net/ruby/

Gordon

yes I have a 16 bit ISA passive backplain, yes sound cards and the like are one of the existing perhiperal cards I'd like to be able to communicate with. now that I'm taken a closer look at the 65c265 it seems like it would solve many interfacing issues HOWEVER employing some GAL chips seems like the way to get the bus signals needed for the ISA bus along with a latch for the high order byte on the bus.

-Justin

You might be able to craft something that fakes the Intel IN/OUT style instructions with a GAL too - so if you were to (say) decode a high bank where you had no RAM into the right signals to go over the bus, then you effectively memory map the IO signals... (At least I'd like to think it's possible that way - it's been a very long time since I interfaced anything to an Intel chip and that was an 8085!)

I used a single GAL in my Ruby816 system to latch the top 8 address lines (although I only bring A16-20 out of the GAL) and another for address decode. If I knew more about CPLDs I'd probably use them instead.

Cheers,

Gordon

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--
Gordon Henderson.
See my Ruby 6502 and 65816 SBC projects here: https://projects.drogon.net/ruby/

I hope you have access to some highly detailed doc, describing (for example) what registers exist on the sound card, and the functions of the bitfields therein. Or would you find it entertaining to reverse-engineer those nitty-gritty details? Maybe that's part of the fun.

It's convenient -- but not a big deal, IMO -- that you don't need to add an address latch, because A23-A16 are already demultiplexed. Are there other interfacing issues which the '265 will solve for you?

Not sure if it'll be helpful, but FWIW here is a post with an outline of one possible scheme for providing a 16-bit data bus. This scheme lets you generate both bus cycles with a single instruction (ie, with the m bit in the P register =0).

-- Jeff
ETA:Yes, that sounds reasonable.

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In 1988 my 65C02 got six new registers and 44 new full-speed instructions!
https://laughtonelectronics.com/Arcana/ ... mmary.html

I think classic sound chips like the OPL3 are quite well documented, and most ISA sound cards offered register level compatibility with at least one of these. It was de-rigeur at the time to program the sound hardware directly; that only went away when games started to run under Windows instead of DOS.

So how to go about dealing with the memory mapping if I were to layout an 8bit card for the 65C265, so the memory over the first megabyte of bus address space can be used without replication or interference from peripherals overlapping.

-Justin

This might be useful as you work out how to fake an ISA bus.

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x86?  We ain't got no x86.  We don't NEED no stinking x86!

Well, I have to roll my eyes on the Intel ISA doc from 1989

IBM announced the PC-AT in 1984, I was Boca and did much of the final review on the PC-AT documentation and the initial EGA card docs as well. In short, the PC-AT defined what Intel later wrote up as the ISA bus. In any case.... lots of water under those old bridges.

The again, I would recommend the original PC-AT Technical Reference manual as a more useful document for this exercise. It has a full technical description of the bus, plus a full set of schematics for the system board, adapter cards and more, plus a listing of the BIOS code. You can download the 644 page manual here:

http://bitsavers.trailing-edge.com/pdf/ ... _Mar84.pdf

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Regards, KM
https://github.com/floobydust