This is probably a feature of dubious utility but I'll ask anyway.

How would one implement a power on RAM test, that is capable of determining how much actual RAM is available?

My first idea was to go through every address, first writing all 1's, and verifying, and then doing the same with zeroes. This would test the RAM for functionality but...

I have I/O directly after the SRAM If I try to write to that, currently my UART will get some sort of garbage activity!

My likely compromise will be to have the test stop before I/O space.

I know that this is a silly idea. More of a "satisfy curiosity" kinda thing.

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http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?

Instead of having the initial memory test work upward, can't you just start immediately below the I/O and work downward?

As for mirrored (aliased) regions, maybe you can detect those by writing the address which you intend to test to that address. Move down by 8K (or whatever granularity seems suitable) and repeat until there's no more space (actual or aliased). When you read the values back any aliased locations will be apparent.

Finally, if desired, you can move on to exhaustive functional testing.

-- Jeff

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In 1988 my 65C02 got six new registers and 44 new full-speed instructions!
https://laughtonelectronics.com/Arcana/ ... mmary.html

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Got a kilobyte lying fallow in your 65xx's memory map? Sprinkle some VTL02C on it and see how it grows on you!

Mike B. (about me) (learning how to github)

Something I've done was to calculate checksums of each page of memory, twice, and see if they were equal. This was viable on the particular hardware (a VIC-20 with a homebrew RAM, EPROM, and two-VIA expansion), where unconnected addresses returned semi-random values on a read, and the VIAs didn't get confused from when just reading their registers, but had timer regs that changed.)