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If you remember, did you find your SDRAM + video interface to be the bottleneck for F(max) in your design, or was their enough bandwidth that this was not the case. Also, what video clock rates were you running? I presume 25.175 MHz?
The hardware that I was working on had a CS4954 composite video chip, with 27 MHz pixel clock, with 8 bit data bus alternating between UYVY (see YUV color coding), so really only 13.5M pixels/sec. SDRAM interface was running at 100 MHz, so there was plenty of bandwidth. However, with overlapping sprites, a single pixel could require several memory reads at different addresses.
To deal with variations in sprite build time and memory delays, the video generator used a 2KB FIFO for pixel data.
Still getting to grips with all the options available within the domain control, so experimenting to give the best web experience.