AH! Your idea is genius. I never would have thought of doing this. You claim this solution is complicated, but in truth it isn't. The ONLY requirement is that at least one instruction be executed from the shared ROM (satisfied with a simple NOP if worse comes to worse). This is a phenonemally simple solution. Thanks!



When you only have 64KiB of space to play with, AND you need as much contiguous RAM as possible, I reckon that it would indeed be necessary. Consider the difficulty in coupling SDRAM with nearly any existing CPU architecture these days. Unless you've got programmable logic of sufficient density to embed an SDRAM controller in it, it's bloody insane. Therefore, for very cheap, deep-embedded systems, a 62C256 or two will inevitably be the next logical choice. (Supposedly there are 512Kx8 SRAMs too, but I've not found a reliable source for them, while 62256s are literally everywhere). The cost per byte goes up at this point, however -- to make the most efficient use of memory becomes a question of economics.

For those interested in 512K x 8 SRAM:

Digikey (www.digikey.com) has 379 in stock for $6.40 each.
Part # is 428-1980-5-ND

Arrow (www.arrownac.com) has 3,900+ in stock for $7.10 each.
Part # is CY7C1049D-10VXI

These are 36 pin SOJ packages which require either an expensive socket or surface mount connection.

Daryl