Small 6502 systems on Lattice ice40

[emeb]

Hi all - first post here.

I've got a couple of small 6502 systems running on Lattice ice40 FPGAs, built entirely with open-source tools. I've found these FPGAs to be inexpensive and easily accessible to the hobbyist since they come in packages you can solder by hand.

The first one is targeted at the readily-available Lattice icestick dev board:

https://github.com/emeb/icestick_6502

It's a bit constrained with only 4kB ROM and 4kB RAM, but it runs at 12MHz and has GPIO and a 9600bps serial port. You can plug it in, program it and talk to it with a terminal application over a USB/Serial link that's built into the devboard. Hardware design is via the FOSS icestorm toolchain and you can code for the 6502 ROM with cc65.

The second one is basically the same thing on a larger FPGA:

https://github.com/emeb/up5k_6502

This one has 4kB ROM and 32kB RAM (easily expandable to 15kB/128kB) but is otherwise similar to the icestick version. I've got it running on a Gnarly Grey upduino board so it's not quite as plug-n-play as the icestick version - no built-in programming and serial interface. I do know that someone else has successfully ported it to the 1bitsquared Icebreaker board though, and that one does have programming and serial interfaces built-in, plus LEDs and buttons.

I've got a few others that are unpublished at the moment, including one which is a full port of the OSI C1P/Superboard (my first computer - I am old). There are some PCB designs in the works to bring out keyboard, video and other I/O and I hope to have a tiny system with full BASIC and video running in the near future.

[BigEd]

Welcome! These sound like great projects. I'll have a good look when I'm back at a desktop.

[dmsc]

Hi!

emeb wrote:

Hi all - first post here.

I've got a couple of small 6502 systems running on Lattice ice40 FPGAs, built entirely with open-source tools. I've found these FPGAs to be inexpensive and easily accessible to the hobbyist since they come in packages you can solder by hand.

I'm aso experimenting with an Upduino board with the ice40up5k FPGA using the open source toolchain, learning verilog in the process.

My current computer is at https://github.com/dmsc/my6502 , it has:

- 6502 CPU, using Arlet Ottens core.
- A reloadable 16 bit timer module, at address $FE00.
- An UART at fixed 115200 baud rate, at address $FE20.
- An RGB led controller (with PWM, ramps and On/Off times), at address $FE40.
- 256 bytes of boot ROM at address $FF00 to $FFFF.
- 63.5k bytes of RAM, at address $0000 to $FDFF.
- VGA output with memory mapped bitmap, 320x204 pixels, at address $C000 to $DFFF.

I discovered that for the VGA output I needed an crystal clock, so he board needs one external oscilator to work.

[Dr Jefyll]

Welcome, emeb! And, emeb and dmsc -- it's exciting to see soft 65xx CPU's brought together with on-chip memory and peripherals!

( Speaking of peripherals, is anyone up to the task of creating a soft 6522? That chip is well known and extremely versatile -- I think a soft version might really generate some interest. )

cheers!
Jeff

[emeb]

Dr Jefyll wrote:

Speaking of peripherals, is anyone up to the task of creating a soft 6522? That chip is well known and extremely versatile -- I think a soft version might really generate some interest.

It looks like there's a 6522 in Verilog here: https://github.com/skibo/Pet2001_Arty/t ... /pet2001hw

[Dr Jefyll]

Cool. Thanks!

[BigEd]

emeb wrote:

Dr Jefyll wrote:

Speaking of peripherals, is anyone up to the task of creating a soft 6522? That chip is well known and extremely versatile -- I think a soft version might really generate some interest.

It looks like there's a 6522 in Verilog here: https://github.com/skibo/Pet2001_Arty/t ... /pet2001hw

Thanks! There's also one by Mike Johnson from FPGAArcade:
https://github.com/hoglet67/BeebFpga/bl ... /m6522.vhd

[hoglet]

BigEd wrote:

emeb wrote:

Dr Jefyll wrote:

Speaking of peripherals, is anyone up to the task of creating a soft 6522? That chip is well known and extremely versatile -- I think a soft version might really generate some interest.

It looks like there's a 6522 in Verilog here: https://github.com/skibo/Pet2001_Arty/t ... /pet2001hw

Thanks! There's also one by Mike Johnson from FPGAArcade:
https://github.com/hoglet67/BeebFpga/bl ... /m6522.vhd

And in Verilog here:
https://github.com/hoglet67/Ice40Beeb/b ... rc/m6522.v

The 6522 is very tricky to get right, and it probably isn't yet!

On the Ice40 theme, I've ported a number of 8-bit based Systems to the Mystorm BlackIce/BlackIce II boards, including the Acorn Atom and BBC Micro:
https://github.com/hoglet67?utf8=%E2%9C ... &language=
https://forum.mystorm.uk/?order=views

Both are currently using Arlet's core, and are working very nicely.

Dave

[emeb]

I've added a third project:

https://github.com/emeb/up5k_basic

This one is a minor extension of the larger Lattice Ultra Plus project which adds an 8k MS BASIC ROM which is connected via the ACIA. It's able to run simple programs, do floating point calculations, etc. The BASIC ROM image I used is for the OSI C1P/Superboard and was found on the osiweb.org site. I'm pretty sure that's still copyright by Microsoft so it's not really for free distribution, but for educational/hobbyist purposes it's fun to play with.

[emeb]

Now with video output



This is an improvement over the original OSI composite video system that eliminates the wasted text in the overscan area and allows a full 32 character/line display.

More here: https://github.com/emeb/up5k_basic

[emeb]

I've added more features:

• * Wishbone bridge to access the SPI & I2C hard IP cores on the iCE40 FPGA
  * Access to the on-chip RGB LED PWM driver IP core
  * 256 x 224 pixel graphics mode for the NTSC composite video output (with 4 selectable pages)

The full design is still using less than 30% of the FPGA resources so there's plenty of room to grow. I've got plans to add more features.

[BigEd]

Great progress! Do you plan to drive a keyboard, somehow or other?

[emeb]

BigEd wrote:

Great progress! Do you plan to drive a keyboard, somehow or other?

Thanks - and yes, the next step is to get a PS/2 interface running so I can hook up a keyboard. At the moment I'm using the serial port hooked to a PC running a terminal app for text in/out, but stand-alone would be a nice option to have.

After that I need to come up with a load/save approach for BASIC programs. The original OSI BASIC used 300bps serial FSK to cassette tape + LIST command to dump out raw text and then read it back in as phantom keypresses - seems pretty kludgey but anything more than that would require augmenting the BASIC code so I'll have to carefully consider this.

[BigEd]

I quite like the save-basic-as-stream-of-bytes-from-a-listing approach of the OSI (and Compukit) machines. It's simple, it allows for program overlays, and the files can be read or written by programs without special knowledge of formats or tokenisation.

[emeb]

BigEd wrote:

I quite like the save-basic-as-stream-of-bytes-from-a-listing approach of the OSI (and Compukit) machines. It's simple, it allows for program overlays, and the files can be read or written by programs without special knowledge of formats or tokenisation.

Oh absolutely - it's very KISS and gets around a lot of transparency issues. The downside is figuring out how to add some sort of external storage. I'd love to have a simple SD card or SPI flash approach to loading and saving BASIC programs and it will take some thought to figure that out. This FPGA can load its bitstream from generic SPI flash, and if I put a large part in the system then the storage beyond the initial bitstream can be accessed by the 6502 design after it initializes. I'd love to be able to load and save to that, but I need to figure out a clean way to do so since the original 8k BASIC doesn't have great hooks for that sort of storage.