Need help with building 6502 in a simulator

[Senijs]

I'm just starting out a 6502 processor project in Logisim. I've done a less powerful processor this way before. But with 6502 come new concepts like interruptions. I would like to ask some questions and maybe you could direct me to some useful texts.
P.S. The whole project will be made out of logic gates almost entirely.

1. How are interrupts being implemented into a processor? What hardware should be added to make it work?
2. How is instruction pipeling being implemented into a processor?
3. How big is 6502's ROM that is used to decode binary opcode into instructions? (I don't know how it's called, it's the one used by Processor's Controller and can be done without ROM.)
4. How is OS or assembly language written into a processor? What hardware is required for that?



Edit:
Added the "less powerful" processor file at https://github.com/Senijs/SAP-2 and added a picture of it.
The processor was built with reference to Paul Malvino's Simple As Possible computer-2.
The processor has all the instructions of 6502, except the Set/Clear Interrup instructions since there are is not interrupt logic in the hardware. Push/Pull Stack Pointer instructions are also not here since I didn't make a stack pointer for the processor. Some minor instructions are also dismissed like Set/Clear Overflow Flag and Set/Clear Decimal Mode since I found no use in them.
I can write out the opcodes if you want to test the processor.

I also found this diagram of 6502 architecture. http://www.erich-foltyn.eu/Technique/6502.html How accurate is it?
I would like to know what the interrupt logic hardware does exactly.
And is it possible to write the whole Operating System/Assembler in RAM? I'm pretty sure it's impossible. You'd have to at least build ROM and other hardware that will store ASCII code and know how to transfer it to screen.
I coudn't find any information on 6502's ROM size that stores instructions and then executes it when the opcode is telling it to.

[GaBuZoMeu]

Hi Senijs,

perhaps you can help yourself by studying the material you find at http://visual6502.org/. Just as a start.


Regards,
Arne

[Dr Jefyll]

Senijs wrote:

I've done a less powerful processor this way before.

It might be helpful if you could tell us more about this other processor. Then we can comment on similarities and differences as compared to 6502.

-- Jeff

ps- the C74-6502 was originally a Logisim design.

[Senijs]

Dr Jefyll wrote:

Senijs wrote:

I've done a less powerful processor this way before.

It might be helpful if you could tell us more about this other processor. Then we can comment on similarities and differences as compared to 6502.

-- Jeff

ps- the C74-6502 was originally a Logisim design.

Jeff, thank you for the reply. I updated the post.

[BigEd]

There are many possible implementations which can run a chosen instruction set - you don't necessarily have to follow exactly what the 6502 does on the inside. Indeed, it will be difficult to be exact. But if you want to follow the 6502's cycle counts, or follow the exact sequence of reads, writes, and dummy accesses for each instruction, that will constrain your implementation.

Erich Foltyn's diagram is not quite accurate enough to match the cycle counts, I think, because it lacks the Special Bus. See Donald Hanson's block diagram, as linked here:
http://visual6502.org/wiki/index.php?ti ... ck_Diagram

[Senijs]

BigEd wrote:

There are many possible implementations which can run a chosen instruction set - you don't necessarily have to follow exactly what the 6502 does on the inside. Indeed, it will be difficult to be exact. But if you want to follow the 6502's cycle counts, or follow the exact sequence of reads, writes, and dummy accesses for each instruction, that will constrain your implementation.

Erich Foltyn's diagram is not quite accurate enough to match the cycle counts, I think, because it lacks the Special Bus. See Donald Hanson's block diagram, as linked here:
http://visual6502.org/wiki/index.php?ti ... ck_Diagram

You know, you might be right. I think I'll just make a 6502 work-alike processor that will have 6502 instructions, but will be done differently on the inside. I'll have some fun with it, try to write an OS for it someway. And when I'm familiar with it I will ask on this forum for help to create an actual replica of 6502 (or something extremely close to 6502).
Thank you!

[BigEd]

One or two people here have found that a microcoded machine is a good choice: simple datapath, complexity in the simple-to-update microcode. Same with the Gigatron.

[Senijs]

BigEd wrote:

One or two people here have found that a microcoded machine is a good choice: simple datapath, complexity in the simple-to-update microcode. Same with the Gigatron.

I never heared of microcoded machines before. If I understood correcty what google said, then microcode is the "code" written in microcontroller, which is basically the sequence in which pins must turn on and off for certain instruction to fetch, decode and execute. If you're suggesting to build a processor that way, I already did with my processor mentioned in description and I will do my new 6502-ish processor the same way.

[BigEd]

Ah, well maybe you have!

If there's a microprogram constantly running which interprets instructions and there's no state machine keeping track of what a multi cycle instruction is doing, sounds likely.

[BigEd]

(BTW I wouldn't use the term microcontroller rather perhaps microsequencer. )

[Drass]

Dr Jefyll wrote:

ps- the C74-6502 was originally a Logisim design.

Indeed, if it’s of interest, you can download the Logisim model here. It is also a microcode based design.