65XX SBC general help and color display help needed

[backspace119]

GARTHWILSON wrote:

backspace119 wrote:

Since I'm rewiring, I may try and make the pads smaller and do this, my only reservation is soldering with such small pads

The pins stick out the back of the board the same distance; and since the holes are thru-plated, soldering the pin will get the heat into the pad and solder that too. No problem at all.

Alright, then I have nothing to worry about.

I looked at the link you posted about clock stretching. I think that's the way to go, since it's faster than a truly different frequency, since it gives more phi2 high time.

My only worry is, I'm planning on using whatever mechanism I come up with to control the whole system clock, to be able to test out new frequencies (without having to switch out cans), and, of course, move to lower frequencies to talk to slower devices (eeprom and probably RTC). To do this, I was going to get a single fast can, (say, 40Mhz) and devide it down to a usable frequency for the computer, starting out at maybe 2-4Mhz and working my way up as I gained confidence the computer could handle it. I'm not sure how to apply your circuit to this scenario, because I believe that chaining them together will just give me a longer phi2 high time, with shorter and shorter low pulses, which will may not give the devices enough time to react to a low pulse.

I've still been looking around, but honestly I think I'm going to have to do this in discrete components, I've not found a suitable setup yet except maybe the one I mentioned earlier

[DerTrueForce]

One thing I've heard recommended is to put a flip-flop on it. That will react only to one particular state or edge, which divides the clock by two, but makes it a 50% duty cycle. Dr Jefyll's profile pic has a schematic snippet that should work.

[backspace119]

DerTrueForce wrote:

One thing I've heard recommended is to put a flip-flop on it. That will react only to one particular state or edge, which divides the clock by two, but makes it a 50% duty cycle. Dr Jefyll's profile pic has a schematic snippet that should work.

Ya, I already have that in my design, but it's more to keep the clock at a clean 50% duty cycle, no matter what the oscillator does. I was just reading an article about chaining JK flip flops together, and that may be the direction that I head with this. (put the output of each into the clock input of the next, and wire each output to an AND gate that has its other input as a selector from a 3 to 8 or similar, to select one of the clock frequencies)

EDIT: Does this sound like something that may cause contention on the PHI2 line to anyone? I'm worried about wiring AND gate outputs together, I suppose I could pass them through and OR if necessary

[backspace119]

So, looking again at variable clock generation, I stumbled upon this thread. It only has 4 replies in it, but the op mentions this chip, which looks interesting. It's SMD but it's SSOP, so not that bad.

How hard would it be to implement this chip correctly? It looks fairly simple, maybe deceivingly so. This looks basically like the last option there is for variable clock generation that's viable, so if this won't work, I have to go with one of the other options.

[backspace119]

Just to get a change of pace from rewiring the board I went ahead and designed a cartridge for the card edge connector. It has 4 spi eeprom chips (I know I probably won't need all these but I was just setting up something simple currently) Here it is:

[backspace119]

so I found this page in reference to the ICS525 IC I mentioned earlier. This ic looks actually fairly stupid simple to implement, and IDC has a calculator program that will give you specific settings for a specific clock (maybe store a lookup table to make changing frequencies in code easier?). Unless anyone has a good reason not to use this chip, I'll probably look at implementing it, it seems to be the easiest and most flexible solution for a variable clock rate.

[Dr Jefyll]

Yeah, the ICS525 is a cool chip, alright. I had occasion to use it in regard to a microcontroller-based stepper motor driver belonging to an industrial client. Photo and anecdote below. Notice the light green Ares LCQT-TSSOP28 adapter PCB used to accommodate the ICS525. Maybe that adapter PCB would be useful for your scheme.

Another option for you is to forget the ICS525 and use a Variable Frequency Oscillator controlled by a trim-pot and simply using an 'AC14 or 'AHC14 and an RC delay. Such a circuit can be built on a tiny scrap of perf-board, and it can have pins that allow it to plug in to the same socket that'll accept an oscillator can. For experimentation you can easily tweak the trimpot and, having found a suitable frequency, you then remove the VFO and install an appropriate oscillator can.

The VFO is somewhat fussy WRT construction details, but the ICS525 approach has drawbacks, too -- it's physically bigger, and its User Interface is *far* less friendly than simply twisting a trim-pot. But it's your choice, whichever approach you think will be more fun!

-- Jeff

About the stepper motor application: a 16 MHz oscillator clocks the microcontroller, which has firmware that drives the amplifiers and motor coils at a fixed and precisely critical speed. The motor originally attached to a 45:1 gearbox, a special-order item which had worn out and needed replacement.

We were able to save thousands of dollars by substituting an off-the-shelf 50:1 replacement gearbox. In order to maintain the specified gearbox output speed it was necessary to boost the microcontroller clock (and thus the motor speed) by exactly 50/45. I couldn't find a 17.777 MHz oscillator, so I used an ICS525-02 to boost the original 16 MHz clock. The LCQT-TSSOP28 adapter PCB from Aries serves as a daughterboard to accommodate the added chip.

[GARTHWILSON]

Dr Jefyll wrote:

Another option for you is to forget the ICS525 and use a Variable Frequency Oscillator controlled by a trim-pot and simply using an 'AC14 or 'AHC14 and an RC delay. Such a circuit can be built on a tiny scrap of perf-board, and it can have pins that allow it to plug in to the same socket that'll accept an oscillator can. For experimentation you can easily tweak the trimpot and, having found a suitable frequency, you then remove the VFO and install an appropriate oscillator can.

shown at viewtopic.php?p=10619#p10619 . (This is mentioned also near the bottom of the 6502 primer's clock-generation page.)

[backspace119]

Dr Jefyll wrote:

Another option for you is to forget the ICS525 and use a Variable Frequency Oscillator controlled by a trim-pot and simply using an 'AC14 or 'AHC14 and an RC delay. Such a circuit can be built on a tiny scrap of perf-board, and it can have pins that allow it to plug in to the same socket that'll accept an oscillator can. For experimentation you can easily tweak the trimpot and, having found a suitable frequency, you then remove the VFO and install an appropriate oscillator can.

GARTHWILSON wrote:

shown at viewtopic.php?p=10619#p10619 . (This is mentioned also near the bottom of the 6502 primer's clock-generation page.)

My only issue with this option is that I would still need a way to interface with lower speed devices like the EEPROM, I could always include wait states, or the clock stretching mechanism that you showed earlier garth, and maybe that's ultimately a better option but I could also use the 525 and have all I need in a single chip.

I'm going to do some more thinking on it before I slap it into my design though, since it is an SMD component and I'd rather not use it if I don't have to.

On an unrelated note, I had a couple ideas last night for some nice things I could include on the board. I remembered in the primer seeing that you'd put a MIDI interface on your workbench computer, and I'm not sure why I didn't plan on including one in the first place. I have a 66 key keyboard that I got for free a while back that has MIDI in and out, it used to be plugged up to my computer over a MIDI to USB interface, and I could record songs or use it for a game called Synthesia (a game that accepts midi files and helps you to learn them and play them, interfacing completely through a MIDI keyboard). Unfortunately, when I bought my new 3D printer back in october it took over the spot that used to belong to my keyboard, and since then I've not been able to use it nearly as much as I'd like to, nor have I been able to plug it up to my computer to do anything with. It would be nice to have the MIDI interface on this for a couple of reasons, so I may look into how to implement it (I don't remember if it was in the primer, but I'm going to go check and see if it is). The other idea that struck me was building a synthesizer daughterboard that connects over one of the IDT headers to one of the 6522s. I could use it for sound on the main board, or I could even control it over MIDI with my keyboard. The heart of it could be a clock generator like the 525 (but not the 525, since it's not designed for audio frequencies) and it could select different filters based on digital input for passing the synthesized waves through.

This is definitely something I don't want to put on the main board for a couple reasons. A: I expect an audio circuit like this to be susceptible to noise, and possibly noisy itself, and B: if I wanted to build this right it would probably take up quite a bit of space, making the board bigger than it was before I started optimizing it.

I think that the daughterboard definitely isn't a bad idea for something to do with the computer down the road, but should I just put the MIDI on the daughterboard too? I suppose that would probably be best, so that I'm not getting carried away again with putting things on the main board that shouldn't really be there.

[backspace119]

After reading through your I/O primer and circuit potpourri again, I realize that the MIDI is put onto a 6551 serial connection. I suppose this isn't horrible, if I put it on a daughterboard I can figure out a serial connection there. Something I saw that was interesting was your mention of the 8 bit DAC you've been using. Would it be possible to run a simple VCO controlled by the output of this DAC? It may be a better option than the 525, but I'm not certain here, I've not worked out all the settings in my head but it seems like it could work, although outputting 0v at startup may cause issues with the VCO.

[backspace119]

So I've been toying with an idea that I had a couple days ago, and, without a lot of cleverness in design I don't think it's possible, but I started thinking about it again because I was reviewing my address decoding (and actually found a few mistakes).

I've been considering the possibility of trying to port the original DOOM to run on this machine.

It's a bit of a running joke to port DOOM to random machines, and it's been done for a lot of crazy stuff. This is by no means a mandatory operation of the design, but it's a fun stretch goal that, if I make it work, would be pretty cool.

A cursory look over some of the requirements to run DOOM tells me that this will be a very difficult task, and is probably out of the realm of possibility. The requirements on x86 are:

• a 486 running at 66Mhz
  8MB of ram
  about 100MB of storage
  windows 95/98/ME/2k compatible 16bit sound card

Obviously on the last part there, windows isn't a real requirement, it's only listed this way because DOOM was compiled for windows, and used OS libraries for sound (and probably video too). I will probably need to get a copy of the source code somewhere (there's probably variations around from when people compiled this thing to run on all kinds of other things (smart fridges, teslas, arduino, etc). and compile it into 6502 assembly (with some custom stuff for my video/sound peripherals).

If I really need 8MB of ram, I've noticed that I could interleave 2 of the 4M memory modules by placing their CEs on A21-23 and global enables on A20 (interleaving doesn't really net anything, so it may just be easier to put their CEs on A20-22 and global enables on A23)

adding a second 4M module would actually only minimally increase board size, because I can use NAND gates on A23 in combination with READ\ and WRITE\ to disable outputs/inputs on the two modules.

Is it dumb to try and even think about running DOOM on this? As I've said, very much just a stretch goal, to continue the joke of putting DOOM on everything.

[backspace119]

So I just found out something interesting on mouser, and I'm posting it here so everyone is aware, and maybe someone in the future will find this.

Mouser sorting of SMD/THT components is actually very inaccurate, most likely due to manufacturers not entering information correctly. I've found multiple 74AHC chips that are listed as "SMD/SMT" mount style, but are PDIP packages (specifically, the 00 and 04), so mouser's sorting of SMD/SMT cannot be trusted.

Due to this, there may be a plethora of parts that are faster than what most people consider available, because they don't show up when sorting to THT mounting. I may start a list if I find enough parts that are marked incorrectly like this.

[GARTHWILSON]

backspace119 wrote:

If I really need 8MB of ram, I've noticed that I could interleave 2 of the 4M memory modules by placing their CEs on A21-23 and global enables on A20 (interleaving doesn't really net anything, so it may just be easier to put their CEs on A20-22 and global enables on A23)

Just to make sure you're looking at it right— My 4Mx8 10ns 5V SRAM module has (this is copied from the data sheet):

• eight separate CE\ pins, possibly allowing faster selects by handling the computer's entire address-decoding scheme with programmable logic if desired than you would get from adding a 74xx138 to this plus the computer's other address-decoding logic
• two WE\ pins, one for each set of four ICs, so your circuit can write-protect half at a time if desired
• two OE\ pins, one for each set of four ICs (grouped the same way as the WE\ pins)

Any global enable will be in your circuit's logic.

Regarding VCOs (voltage-controlled oscillators):
Somewhere in my file cabinets I have data sheets on programmable oscillators like you mention. I can't think of what to look under to find them at the moment. A web search might be faster and of course come up with more-modern parts. I think what I had filed was programmed by I²C. They maxed out at something like 100MHz. Obviously you would want a usable default so that the computer powers up with a clock rate that's not so slow you'll never get going nor so fast that essential parts won't work before you can feed it the first instruction to output another clock rate. These had a maximum error of something like 2% which is not accurate enough for some things but plenty accurate for others.

A D/A converter feeding a VCO might be a nice option too. I have not really looked into it. The only VCOs I've designed were for super low frequencies. You wouldn't have to worry about it powering up at zero Hz (from a DAC output of 0V), because you could use op amps to set the range so for example 0 to 5V from an 8-bit DAC would get translated to a range of 2 to 4V (still in 256 equal-sized steps) into the VCO, if that would yield 8MHz to 16MHz for example.

A PLL (phase-locked loop) might be another good way to do it, where instead of outputting a number to a DAC to directly feed a VCO, that number is instead the divider for the PLL. (Of course the PLL has its own VCO too though.)

[backspace119]

GARTHWILSON wrote:

Just to make sure you're looking at it right— My 4Mx8 10ns 5V SRAM module has (this is copied from the data sheet):

• eight separate CE\ pins, possibly allowing faster selects by handling the computer's entire address-decoding scheme with programmable logic if desired than you would get from adding a 74xx138 to this plus the computer's other address-decoding logic
• two WE\ pins, one for each set of four ICs, so your circuit can write-protect half at a time if desired
• two OE\ pins, one for each set of four ICs (grouped the same way as the WE\ pins)

Any global enable will be in your circuit's logic.

Ya what I mean is, I have OE and WE pins tied together on the module, and I can put their enable on a NAND gate with inputs of A23 and Write/Read that are active high. The other chip I'd need to invert A24. I'm actually looking at the gate delays right now (trying to plan for up to 20Mhz to give headroom) and since it appears most AHCs are 8.5ns, 3 gate delays seems to be right at the max (25.5ns), for half of a 20Mhz cycle.

GARTHWILSON wrote:

Regarding VCOs (voltage-controlled oscillators):
Somewhere in my file cabinets I have data sheets on programmable oscillators like you mention. I can't think of what to look under to find them at the moment. A web search might be faster and of course come up with more-modern parts. I think what I had filed was programmed by I²C. They maxed out at something like 100MHz. Obviously you would want a usable default so that the computer powers up with a clock rate that's not so slow you'll never get going nor so fast that essential parts won't work before you can feed it the first instruction to output another clock rate. These had a maximum error of something like 2% which is not accurate enough for some things but plenty accurate for others.

The issue I ran into with programmable ones (which all seem to be I2C) are they are incredibly tiny foot prints, and most seem to have ranges that are unacceptable, and even more are incredibly expensive.

GARTHWILSON wrote:

A D/A converter feeding a VCO might be a nice option too. I have not really looked into it. The only VCOs I've designed were for super low frequencies. You wouldn't have to worry about it powering up at zero Hz (from a DAC output of 0V), because you could use op amps to set the range so for example 0 to 5V from an 8-bit DAC would get translated to a range of 2 to 4V (still in 256 equal-sized steps) into the VCO, if that would yield 8MHz to 16MHz for example.

I'm pretty comfortable with opamps, and they come in nice DIP-8 packages, so this may be the way to go if I can find a suitable VCO. It seems like possibly a simpler implementation than the 525.

GARTHWILSON wrote:

A PLL (phase-locked loop) might be another good way to do it, where instead of outputting a number to a DAC to directly feed a VCO, that number is instead the divider for the PLL. (Of course the PLL has its own VCO too though.)

I looked briefly at PLLs. After reading how they work on wikipedia they seemed to not be a good option though, as from what I read it seems they try and match a reference clock, rather than generate a variable clock. (I suppose maybe some feedback mechanism can make them reference their own clock, and allow control over it). Before today I remember working with PLL settings in computer BIOSes in the late 2000s to early 2010s, I think they mostly hide what hardware is driving clocks now, but that was my only exposure to them until now.

[backspace119]

Considering the VCO fed by a DAC option here, I present this again. Earlier it was mentioned that there are parts available that are similar and CMOS, since these are in the LS series. Anyone have links to the similar parts? (preferably in DIP like these), and also, will these chips still work for what I need? I know I can't "clean" the output with a flip flop because they only reach up to 20Mhz, which would limit me to 10Mhz operation, but the worst part about these seems to just be their power draw.