Wiring SRAM to W65C265SQXB

[/RESET]

Hi folks, and thanks all who stopping by!

After a couple of days of "vacation" on a MSP430 I am back on this project now. I took some time off because I couldn't get the TIMER7 to work with interrupt enabled. Even a simple handler with only a RTI did not work, all I got was a locked up CPU.

While polling the flag worked fine, enabling the interrupt routine did not.

BTW The MSP430 has a very nice and versatile and clever instuction set ... well worth to be discovered and quite a relaxing experience.

Back to the 65C816, revising the code and studying the datasheet once again to see if I possibly had overseen something but to no avail: the code seems right to me but simply does not work.

To try something different, I commented two lines of code which didn't seem very critical to me. When entering this code, the timer is not running (TER[7]=0) and the TIER[7] bit isn't set either. The idea behind setting the timer counter to zero was to start at a defined point, since this register is uninitialized after a reset as of the datasheet.

Code: Select all

                lda     VAL16           ; set limit for Timer0
                sta     T7LL
                lda     VAL16+1
                sta     T7LH

                ; stz     T7CL           ; <== evil code
                ; stz     T7CH           ; <== evil code

                lda     TIER            ; enable timer7 interrupt
                ora     #$80
                sta     TIER

                lda     TER             ; enable timer7
                ora     #$80
                sta     TER

I still don't know what's wrong with this code, if anybody has a clue on that, please let me know.

Well, after this change, everything started to work like expected. I am using the TIMER7 interrupt to drive a simple counter on the PORTA and PORTB register of the 65C21 flashing some LEDs.

Another thing that I changed was replacing the ATtiny85 I2C BusMaster with a ATmega328 chip. I modified the firmware to support SPI for up to 8 slaves as well as adding support for reading the remaining four ADC ports of the chip.

Another benefit of this solution is that now both, 65C816 as well as ATmega328 communicate with the hardware UART instead of the SoftwareSerial of the ATtiny85.

Sending a simple command like "SPI02020011FF" from the 65C816 to the ATmega selects SPI slave #2, wich in my case is a SPI capable MCP41010 potentiometer IC and puts the wiper at position FF. Then the corresponding voltage can be read with the "ADC00", since the wiper of the MCP41010 is connected back to the A0 analog port pin of the ATmega328.

As you can see in the image below, I am running out of breadboards. Have to get some more since this project is far from beeing finished.

Happy breadboarding!

[/RESET]

Shame on me!!!



I think I must have been blinded or otherwise mentally absent when I was reading the timer section of the datasheet. May have been messing around with the MSP430 what caused the confusion on how the timer was supposed to work.

After programming some additional tests, I figured out, that writing to the counter register also affects the latch register. First I thought this might be a bug, but after reading (now really reading and trying to understand) the datasheet I saw it was a documented one or no bug at all of course.

It's actually quite handy doing it this way, since a unique register write sets it up, instead having to write separately.

This now explains why the STZ into the counter register was total nonsense, since it defined a timer period of 0 cycles which obviously caused too much interrupts being fired so the CPU did lock up or at least no longer return to the monitor.

Glad to be back on track now ...

[GARTHWILSON]

If it's like the 65c22's timers (and other 65c22 portions), you might find a lot of helpful stuff in the Tip of the Day column I did on this forum many years ago.

[/RESET]

Thank you very much for taking the time and giving me this advise.

You have collected really interesting stuff there and I am sure it will be a pleasure to read through.

A lot of info mixed with practical tips ... I love it.

GARTHWILSON wrote:

If it's like the 65c22's timers (and other 65c22 portions), you might find a lot of helpful stuff in the Tip of the Day column I did on this forum many years ago.

[/RESET]

After getting timer and W65C21 interrupts working, I built a small test setup ...

The image 1 below shows the output of pin 10 (PB0) of the W65C21 and is toggled via Timer7 interrupt routine.

The image 2 below shows the output of pin 38 (IRQAB) which signals an interrupt for negative edge event on pin 40 (CA1) which is driven by an external ATtiny85 generating a 8us pulse every 230us.

Both events are occurring in parallel.

Happy Breadboarding.