SCC2691 Progress

[floobydust]

Okay, after over 3 years of this chip sitting in a static tube, I finally put in some time and built up a small adapter to fit into a 65C22 socket on my I/O board. I used a 74HC00 for an inverted reset, qualified read and write signals with PH2 clock and added a crystal for the on-board oscillator. I also used a FTDI D9-USB-5M adapter to interface to ExtraPutty. In short, I have two serial adapters on the I/O board, the standard 65C51 and the SCC2691 in place of the 65C22. This allows me to have two terminal sessions; one for the main console so I can use my monitor and one for the SCC2691 for testing.

I hand coded some simple routines via the monitor to initialize the chip, read the status register, receive a character, send a character and start and stop the counter/timer. After a bit of reading... okay a lot of reading... of the datasheet and Application Note AN405, I've managed to understand how to set up the chip for basic polled mode. Now that I have functional hardware, I can start writing an updated BIOS to handle interrupt-driven transmit and receive and be in a position to replace the 65C51 and also set the stage for moving to the NXP DUART chips.

It took too long to get to the wiring of the adapter board, but now that it's functional, I'll likely get a new SBC board put together shortly. Whew.... progress... finally!

[floobydust]

I spent some time this evening and wrote an interrupt handler for the 2691. Currently, it handles the counter, receive, transmit and the delta break functions. I'm also using a 128-byte circular buffer for transmit and receive and the counter/timer for a realtime clock based on 10ms intervals (jiffy clock). The 2691 is now running as the console with my existing monitor code. One very odd thing about this chip, for some unknown reason (so far at least) I have to initialize the chip twice to get it to send and receive characters. Oddly, the timer works with a single reset (verified with the 65C51 running as the previous console). Still looking into this anomaly but there is some mention in AN405 about the delta break flag set on E revision parts (SCN2681/68681 only) which also notes resetting the chip twice or sending commands that re-init most of the chip and gives an example. It's an odd one, but I have replaced the 6551 with a NXP UART. With my existing board, I can run up to 6MHz and the chip functions properly. Attempting 8MHz didn't work. Still a ways to go in cleaning up the 2691 BIOS and a few changes to the monitor code, but I hope to have that sorted out shortly.

[telbee71]

Hi there. Glad to see progress being made with nxp duarts. I've a few 68681s that I'm going to drag out of the toy box one of these days. You said you couldn't get it to run at 8Mhz - did you mean the 6502 on 8mhz or have you a separate clock to the 2691? AN405 says clock should be 2 - 4 mhz. Just curious.

[floobydust]

telbee71 wrote:

Hi there. Glad to see progress being made with nxp duarts. I've a few 68681s that I'm going to drag out of the toy box one of these days. You said you couldn't get it to run at 8Mhz - did you mean the 6502 on 8mhz or have you a separate clock to the 2691? AN405 says clock should be 2 - 4 mhz. Just curious.

I've since completed a project using the SCC2691. Clock rate being the CPU clock rate... timing on the SCC2691 basically limits you to 6MHz. I did find one chip in my group of a dozen that survives at 8MHz, but per the chip spec, 6MHz should be observed as the maximum safe (CPU) clock rate.

Note that the SCC2691 is an older single channel UART. I've written a full BIOS to drive the chip and to date, 3 completed boards have been active for over 120 days without a single failure. A link to the completed C02 Pocket-SBC project can be found here:

viewtopic.php?f=4&t=5005

Good luck on using your (D)UARTs. Initially there's a bit more programming effort to get the NXP chips working (vs the 6551) but overall it's worth it.

[BigDumbDinosaur]

floobydust wrote:

I've since completed a project using the SCC2691. Clock rate being the CPU clock rate... timing on the SCC2691 basically limits you to 6MHz. I did find one chip in my group of a dozen that survives at 8MHz, but per the chip spec, 6MHz should be observed as the maximum safe (CPU) clock rate.

For new projects, I'd recommend the 28L91 or 28L92, as they have much faster timings. My POC V2.1 unit runs at 12.5 MHz with two 28L92s and I've got ample timing headroom at that clock rate.

[floobydust]

BigDumbDinosaur wrote:

floobydust wrote:

I've since completed a project using the SCC2691. Clock rate being the CPU clock rate... timing on the SCC2691 basically limits you to 6MHz. I did find one chip in my group of a dozen that survives at 8MHz, but per the chip spec, 6MHz should be observed as the maximum safe (CPU) clock rate.

For new projects, I'd recommend the 28L91 or 28L92, as they have much faster timings. My POC V2.1 unit runs at 12.5 MHz with two 28L92s and I've got ample timing headroom at that clock rate.

I agree with you at least 100% on using the newer NXP UARTs My C02 project was initially designed about 4 years ago... and having 95% of all the parts sitting (sans the PCB), I wanted to finish it up and ensure I could get everything working. It was also my first dive into using a PLD for a single glue chip and preferred to stick with all DIP parts. My next SBC will be mostly PLCC parts and use the 28L92... hoping for 16MHz CPU clocking.