Suffice to say, I'm gonna need some help; perhaps even that of The Peddle or The Mensch himself. Decappers, assembly programmers, high speed high bandwidth memory controller designers and people generally skilled in CPU design will be needed.

For more info, check out /r/CenturionDynamics on reddit.

Nice lack of password encryption too lol.

Peddle? Mensch? That might be interesting. However, it says, "You must be invited to visit this community [...] The moderators of this subreddit have set it to private."
link: https://www.reddit.com/r/CenturionDynamics

_________________
http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?

Happy to invite you if you have a reddit account and are OK with PMing me (eton975) on reddit too.

Also, have sent you a mail, not sure if you've gotten it or would (VERY understandably) like more details about it.

Scarcely any info there. And the subject line of this thread says little enough. Is it a teaser? Are you relying on people to be proactively curious?

No offense taken, and I wish you success. I just find it a questionable strategy.

_________________
In 1988 my 65C02 got six new registers and 44 new full-speed instructions!
https://laughtonelectronics.com/Arcana/ ... mmary.html

Thanks.

Yeah, kinda. It's also pretty secretive, hopefully for good reason and just for the time being. I've spoken with several in the European semi industry and they seemed to show at least some interest, but things are in the position of being both: 1. very early on and 2. heating up quick if things don't get moving.

Sorry if I've taken a while to give a 'public' update. I've got a decent skeleton of a plan figured out; the biggest issues at the moment I'd say are (staff?) training, funding (!) and a lack of personal experience with VHDL/SystemVerilog code and its validation techniques.
(test vectors, building a reliable and redundant validation cluster, storing the test data and comparing to oscilloscope readouts from prototype chips given the same software being run/system state).

Additionally I'm not *exact* on the details of porting chip designs between different semi. processes, and the careful accounting for quantum physics this entails (ie. resistor/cap behaviour near FinFETs).

The good news is I have looked into other areas of the HL design, figured out (?) ways to ease bottlenecks, ILP and clockspeed (?) issues with the VLIW design, given a good transistor budget and careful core design. I've also looked into manufacturing equipment (think fast CVD/ALD chambers, ArF lithography systems, wafer furnaces and grinders, cleanroom requirements and design, oscilloscopes, wafer probers ie. EG2001X for older processes, CPS 4090u+ for a newer process on 200mm (?), BGA soldering machines and PCB printers) for our manufacturing needs.

Any comment from anyone? I realise this is an extremely ambitious project (especially given my level of experience with the actual on-the-ground design and manufacture), but I've done a fair bit of budgeting and have contacted many of these test equipment companies (Complete Probe Solutions, Celadon, gonna try and get through to FuturePlus and Analog Devices maybe) and have come up with a plan. Have also figured out ways to avoid being bankrupted by Intel suing, given good funding for patent lawyers.

Haven't heard back from anyone here since the last time I talked to Garth (not trying to call anyone out), and would appreciate further input before (if?) the train really gets rolling and I have to commit to funding sources/equipment orders/hiring. Cheers.

It's an interesting idea, so far as I can see, but I don't yet see what the general idea is: are you looking for volunteers? Employees? What's your business plan, and how are you funded? What expertise do you bring and what's your assessment of the risks and rewards?

Success is all about execution - you probably already know this - whereas ideas are cheap. Assembling teams and funding and achieving sales is orders of magnitude more difficult. So anyone being asked to put in time or effort, or to make sacrifices, needs some kind of reassuring story.

I do wish you well in your endeavour, and hope you find the collaborators you're looking for.

Breadboard it, and I will help y'all out.
Can't be done?... bah.

Brad

Appreciate the responses, for sure. Happy to collaborate with peeps here if there's a mutual benefit (I know you're dreaming about a 4Ghz 64-bit 6502-compatible lol)



For sure. I've basically been handling everything so far; will need to reach out and setup some good connections and people to take a load off me. Learn some Verilog too lol.

Wait, what? You're designing a high-speed, wide 6502?
I thought it was an x86....

It does need to have some 65xx application to be on this forum.

_________________
http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?

I did wonder why it looked as off-topic as it did and wasn't shut down...

When comparing 80486 and Pentium 4, it becomes evident that their internal architecture is _very_ different.
They just both "understand" the 80x86 instruction set, and this might be all they have in common.

Same thing for 68000 and 68060.
IIRC 68000 used three PLAs for generating a 10 Bit microcode address from the OpCode,
but 68060 (two integer ALUs) internally translated the 68k machine code into 48 Bit RISC code.

So if you happen to have a fast VLIW CPU and tinker a bit with instruction decoding etc.,
in theory it's not impossible to run 80x86 and 6502 machine code on the same chip.

But the problem is, that the 80x86 instruction set doesn't seem to make much sense, also it had evolved in a "natural way" (like tumors do).
Translating 80x86 machine code in real time certainly won't be fun, and the technical implications related to this might fry your brain.
It's a pity, that Transmeta went out of business...

But back on topic.
Back in 2008, there was that TREX TTL CPU project, inspired by Forth hardware CPUs.
There were 3 simple RISC instructions packed into a 32 Bit instruction word.
Ok, the CPU only was able to handle 32 Bit data, one would need 8 Bit and 16 Bit data types, too.
Point is, that if there were 5..8 RISC instructions packed into an instruction word, one could in theory use it as microcode for emulating
something like a 6502.
And with simple RISC instructions, checking dependency between them and making the thing superscalar\VLIW in theory also might be possible.

IIRC building that TREX TTL CPU took two manyears or so.
Hmm... not to discourage you, but for making up a "bullet proof" concept for 80x86, better expect this to take 100 manyears+ or such.
Good luck.

For most projects here, if you were to ask the dreaded "why" question, you'd get an answer like
- because I find it interesting
- because I want to learn something
and sometimes
- because I want to teach
or
- because I think I can sell a few of these

And all of those work pretty well as motivations. On the other hand answers like
- because I can make a business from this
or
- because I want to change the world
seem to me to be very much more ambitious. And I think these answers also lead to different ideas in development - if you want to make a business, maybe a new z80 is a better bet than a new 6502 - if you needed funds, or needed to attract collaborators, you'd want to be able to justify the choices you'd made. You might want to have scouted some prospects and got some interested parties who could become customers. You might have got useful feedback from those prospects as to what they value - price, support, features, compatibility.

I do personally enjoy collaboration, and I like projects which are collaborations. Getting a project started by consensus is rather tricky, but getting a project started and then inviting collaboration is also tricky. You're dealing in variables like trust, confidence, communication styles, ways of working. Both ways are certainly possible, but they don't come for free.