Chips4Makers

[BigEd]

Thanks for the update - good to see progress! And 5V I/O sounds good to me.

[DerTrueForce]

Will it be possible to run the IOs at 3.3v as well as 5v? That would give it extra flexibility.
If I have the money when the crowdfunding campaign goes live, I'll probably put in a bit.

[Fatsie]

DerTrueForce wrote:

Will it be possible to run the IOs at 3.3v as well as 5v? That would give it extra flexibility.
If I have the money when the crowdfunding campaign goes live, I'll probably put in a bit.

I'll need to simulate it what happens when 3.3V is provided for VIO. I guess they will work but it's unsure if the VOH, VOL levels will be in spec.

[ttlworks]

Thanks for keeping us updated.

Fatsie wrote:

Peripherals I would like to include are UART, SPI, I2C, PWM.

Another option might be some sort of "programmable logic" tied to counters and comparator blocks.

Fatsie wrote:

I'll need to simulate it what happens when 3.3V is provided for VIO. I guess they will work but it's unsure if the VOH, VOL levels will be in spec.

If VIO=3.3V fails, one still could use chips like 74LVC245 or 74LVC2T45 as level converters.

[Fatsie]

I presented my project on FOSDEM, firstly a presentation on the Retro-uc itself; secondly a presentation focused on the (open source) tools used for realizing the chip. In the videos you'll find more explanation of the project and the choices made.

[BigEd]

(There's an interesting discussion on the economics of chip production here. The link to Adapteva's story is perhaps especially relevant. Cost-reduction at modest volume is an interesting problem!)

[DerTrueForce]

This just occurred to me: Will the 6502 core be NMOS or CMOS-compatible?

[Fatsie]

DerTrueForce wrote:

This just occurred to me: Will the 6502 core be NMOS or CMOS-compatible?

I am using for the moment a NMOS compatible core as was used in FPGA reimplementation of C64.