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PostPosted: Tue Oct 10, 2017 3:17 pm 
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Joined: Thu Dec 11, 2008 1:28 pm
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Location: England
Did you pick up this oddity, Ted?
A taken branch delays interrupt handling by one instruction
I wonder if there's a way to test your core against visual6502 or perfect6502.


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PostPosted: Tue Oct 10, 2017 3:34 pm 
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No, I considered it but decided not to implement that feature, nor did I implement the BRK getting lost during NMI oddity.

To me, the Visual6502 represents the "real" 6502 at the gate level, so my microsequencer emulation could only come close. Visual6502 is exact!


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PostPosted: Tue Oct 10, 2017 3:49 pm 
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That's fair enough! It might be notable though that these extreme corners of behaviour were found, in some cases, by failing to accurately emulate the behaviour of legacy code - in one case, copy protection software which interacts with the timer/counters of a VIA in a deeply entangled fashion.


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