In Mr. Wilson's NMOS/CMOS differences page(http://wilsonminesco.com/NMOS-CMOSdif/), about halfway down, there is a table of instructions that first appeared on the CMOS version.
Among these are a set of instructions that set/reset and branch on certain bits in a ZP location. That page says they are available on the WDC and Rockwell parts. According to WDC's programming manual (by Eyes and Lichty), these instructions are not present on the WDC part, only the Rockwell.

Which is correct?

They are included in the w65c02 according to http://www.westerndesigncenter.com/wdc/ ... 65c02s.pdf, but I seem to recall that the Rockwell instructions weren't included in the early iterations of WDC's processor. But I can't find an old enough datasheet at the moment.

Crossed over with Tor, but:
Actually, upon looking at the actual datasheet, I see that the bit-manipulation and branching instructions are indeed on the current W65C02S.
It may be worth explicitly noting this on your page, Mr, Wilson.

Update: Wikipedia says that there used to be a '65SC02' processor which was a variant of the W65C02S but lacked the bit instructions. But I can't figure out from the WP history who inserted that information. It seems to refer to one of Zaks' books though.

I can definitely confirm that the W65C02S definitly has those instructions, as I use them quite a lot in my software.

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Also, I maintain KiCad libraries of Retro Computing and Arduino components you might find useful.

I can imagine. They will probably be of great use to me, although not for hardware waiting loops like the ones I'm using at this stage.

From personal experience I can tell you hardware waiting loops are a great way to benefit from the BBS/BBR instructions! And SMB/RMB are terrific for bit-bang outputs. However, only a minority of 65xx systems map their I/O into zero-page. Sometimes there are good reasons for that; other times it represents a missed opportunity. For further discussion see major speedup with 65C02 I/O mapped into zero-page.

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In 1988 my 65C02 got six new registers and 44 new full-speed instructions!
https://laughtonelectronics.com/Arcana/ ... mmary.html

An earlier thread suggests that WDC initially didn't offer these instructions, but for a long time now they have included them in their offerings.
viewtopic.php?p=8218#p8218

Note also that the CMD/GTE 65SC02 part does not have them.
http://6502.org/documents/datasheets/cmd/

Ok, I'll do that.

Bill Mensch said recently that he wasn't fond of those but consented to add them to WDC's 65c02 when, if I understood correctly, a customer (company, not individual) wanted them. I remember in the late 1990's when they had both versions, and they put a "B" on the end of "W65C02S" to indicate the ones that had the bit-manipulating and -branching instructions, but then they made them all have them and took the B back off.

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http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?

They are definitely more useful on the 6501 and 6541 chips that had peripherals mapped into page zero.

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Andrew Jacobs
6502 & PIC Stuff - http://www.obelisk.me.uk/
Cross-Platform 6502/65C02/65816 Macro Assembler - http://www.obelisk.me.uk/dev65/
Open Source Projects - https://github.com/andrew-jacobs

Scratch that. Make it early 90's. I found the following again, in the Aug '92 data sheet. By the July '96 data sheet, these instructions were standard in all of them.


The note at the end of the Aug '92 data sheets says:

7.1 Bit Manipulation

The Bit Manipulation Instructions have been added to the standard W65C02S. The designation for this updated device is W65C02SB. [...] The W65C02S will continued to be produced for a period of time. The W65C02SB will eventually become the only W65C02S device available.

I updated the web page.

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http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?

An alternative might be to be to use BIT - if the status bit you are interested is either bit 6 or bit 7, you can use BIT followed by BMI/BPL or BVS/BVC, rather than LDA followed by AND and then BEQ/BNE.

I've been working with CHOCHI lately, and the status register on the CHOCHI has RX_READY as bit 6, and TX_FULL as bit 1. So, polling for received character can be coded as


By making a trivial change to UART.v, you can code putchar as


Without this change, you would have to do something like

What I'm about to say doesn't concern the bit instructions, but it may be relevant to the conversation above. To watch a certain input bit, you can also wire it to the VIA's CA1, CA2, CB1, or CB2 and take advantage of its feature to interrupt on the selected edge. Select it in the VIA's PCR. To interrupt every so many edges, use the VIA's timer/counter 2 (T2) in pulse-counting mode, counting pulses on PB6. You load the desired number into T2, then when the decrementing brings it down to 0, it generates the interrupt. At the same time, you could use T1 as a phase-2-based timer, and the ratio gives you a frequency counter. The computer can spend most of its time doing something else while the VIA counts. No need for loops.

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http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?

rwiker, your second code sample appears to be seriously defective.

Mike B.

Ah... the "BPL putchar" in the third code sample should be "BPL putch1"... is that what you meant?

On the plus side, I got the indentation right