Forth on a Word Versus Byte Addressable Machine

[Martin_H]

Not strickly a 6502 topic, but it is relevant. The 6502 and all other machines I've used Forth on were byte addressable machines. On such architectures the word CELL returns a number like 2 or 4. But there are computers that are word machines like the PDP-8 (12 bit words and address space). Such architectures refer to the first 12 bits as address 0, the next 12 as 1, and so on.

Assuming that you could port Forth to something like a PDP-8, would CELL return 1?

[commodorejohn]

Probably depends on the cell size of the implementation. I can't remember if there were any standard Forth implementations for PDP-8, say, but doesn't the standard specify a minimum cell size of 16 bits? I'd imagine that a PDP-8 Forth would likely use two words per cell. On the other hand, a larger word-addressable machine (there were a few 16-bit word-addressable computers, and multiple 18-, 24-, and 36-bit ones) probably would use one word per cell.

[GARTHWILSON]

commodorejohn wrote:

but doesn't the standard specify a minimum cell size of 16 bits?

I just looked in my old paper ANS Forth spec and found what I was sure was there, §3.1.3:
"Cells shall be at least one address unit wide and contain at least 16 bits. The size of a cell shall be an integral multiple of the size of a character."
Obviously my HP-71's Forth wouldn't qualify. It came around before ANS Forth anyway; but since it has a 4-bit data bus and a 20-bit address bus, a cell is 20 bits, and a character is 8 bits or two address units. (It addresses a meganybble, or half a megabyte without banking.) That was my intro to Forth, in about 1989 or 1990.

[barrym95838]

I just looked at my 65m32 Forth, and CELL is ( -- 1 ) . CELL+ is defined as 1+ and CELLS is a no-op. Also, C@ is defined as @ , C! is ! , and ALIGN and ALIGNED are no-ops.

Mike B.

[Dr Jefyll]

Martin_H wrote:

Assuming that you could port Forth to something like a PDP-8, would CELL return 1?

Apparently not, if it's ANS compliant. (Thanks, Garth, for the reference.) You'd need two 12-bit words to reach the 16-bit minimum for a cell, so CELL would return 2. But certainly a non-compliant Forth could use 12-bit cells and reside in a 4 Kword space, in which case CELL would return 1. Except the word CELL might not exist -- you'd have to trim a lot of the non-essentials in order to fit in so cramped a space! But the speed would far exceed that of an ANS-compliant implementation.

[commodorejohn]

GARTHWILSON wrote:

I just looked in my old paper ANS Forth spec and found what I was sure was there, §3.1.3:
"Cells shall be at least one address unit wide and contain at least 16 bits. The size of a cell shall be an integral multiple of the size of a character."

Ah, that's an interesting wrinkle. So for the PDP-8, that would seem to imply a minimum cell size of two words (24 bits) unless the size of a character is itself implementation-dependent.

Lord only knows what 18-bit systems would do.

Dr Jefyll wrote:

Apparently not, if it's ANS compliant. (Thanks, Garth, for the reference.) You'd need two 12-bit words to reach the 16-bit minimum for a cell, so CELL would return 2. But certainly a non-compliant Forth could use 12-bit cells and reside in a 4 Kword space, in which case CELL would return 1. Except the word CELL might not exist -- you'd have to trim a lot of the non-essentials in order to fit in so cramped a space!

Well, if it's an -8 with extended addressing (which is, I think, most of them,) there's up to 32 KW to work with, although I'm not up on what the ANS standard implies for address sizes and/or segmented address space.

[BigEd]

commodorejohn wrote:

Lord only knows what 18-bit systems would do.

No problem:

Quote:

The DEC SIXBIT format packs three characters in each 18-bit word each 6-bit character obtained by stripping the high bits from the 7-bit ASCII code, which folds lowercase to uppercase letters.

[Martin_H]

Thanks for the replies. It sounds like a word addressable architecture that is at least 16 bits with a word size that is a multiple of 8 could have a cell of size 1. For example if we had a 16 bit machine with a 16 bit address space, then CELL would return 1 and be 16 bits wide.

[BigEd]

Bruce Clark ported EForth to the 6502 and the 65Org16 - that's a word-addressed machine. See
http://biged.github.io/6502-website-arc ... eforth.htm for a download.

Quote:

The files are:

EFO16I##.ASM - eForth for the 65org16, indirect threaded code (ITC)
EFO16S##.ASM - eForth for the 65org16, subroutine threaded code (STC)
EFHYBI##.ASM - a version of EFO16I01.ASM that runs on the 65C816
EFHYBS##.ASM - likewise for EFO16S01.ASM

[BigEd]

(We might yet try to port EForth to the OPC5 machine, which is a 16-bit word-oriented machine expressed in one page of code. Judging by recent experience porting Bruce's pi program from 65Org16 to OPC5, it shouldn't be too challenging.)

[larsbrinkhoff]

Martin_H wrote:

Assuming that you could port Forth to something like a PDP-8, would CELL return 1?

I have, and yes, it does. I feel that wasting 4 bits per character in a string isn't too bad and that strict adherence to the standard isn't necessary. EDIT: Also, I'm ok with just addressing one field. (A "field" is 4K words, i.e. what can be adressed with a 12-bit word.)

Now, the PDP-10 is also word adressed but with 36-bit words. That's more of a conundrum.

[barrym95838]

larsbrinkhoff wrote:

Now, the PDP-10 is also word adressed but with 36-bit words. That's more of a conundrum.

I'm interested in any of your detailed thoughts on this, for slightly selfish reasons.

Mike B.

[larsbrinkhoff]

barrym95838 wrote:

I'm interested in any of your detailed thoughts on this, for slightly selfish reasons.

I hesitate to go off topic here, so let me know if I'm out of line.

I see three options, none quite satisfying:

• Have the addressing unit be the word. CELL = 1. Store characters one per word and waste lots of space.
• As previous option, but pack four (or five) characters per word. So there's no straightforward way to iterate over characters in a string. Add new wordset to deal with packed strings?
• Have the addressing unit be a 9-bit byte. CELL = 4. The PDP-10 has byte pointers, but it would probably be somewhat painful to go back and forth between word addresses and byte pointers.

[whartung]

I think option 1 with some PACK and UNPACK utility functions would be the most useful and most performant in the general case.

Strings would be represented as packed words, rather than arrays of characters, then they're treated as a "whole", rather than a collection.

You could also implement "PC@" and "PC!" to act directly on the packed structures. Good for onesey twosey stuff, but if you were doing serious work, you would be better to unpack the structure and work from that. Take the memory hit, do big operations, and then repack it.

Pascal formalized around the concept of "PACKED" for arrays and records to work with machine like the CDC 60 Bit machines, and things like the 36 bit PDPs.

[JimBoyd]

whartung wrote:

You could also implement "PC@" and "PC!" to act directly on the packed structures.

PC@ and PC! are words in FPC, a Forth by Tom Zimmer that runs under MS-DOS. They, as well as P@ and P! are used to access i/o ports.

Cheers,
Jim