Sym-1/69

[andysa]

Thanks Garth. Wasted the last half hour of my life trying to work out what was wrong with the image tag

[GARTHWILSON]

I suppose phpBB didn't like something in it, because copying the URL to another tab worked for me. I just right-clicked on the picture and selected "Copy Image Location" and used what I got there, even though it was a lot longer. (I'm on Linux. I don't know if the right-clicking gives the same choices in Windows, or how to do it in Mac.)

[andysa]

Installation Instructions

EPROMS 2516

[andysa]

Upper Layer PCB traces with CPU removed

Lower Layer

[andysa]

sym1_69.zip

Sym-1/69 Supermon Eproms

(3.39 KiB) Downloaded 178 times

Attached are the binary images for the two 2516 Eproms that shipped with the Sym-1/69 Mod Board.

Reading the 82S123 Prom is going to be somewhat trickier, as my Eprom programmer doesnt support it.

However, this PROM is simply generating an NMI for certain address pages, in order to support the SYM's debug function.

With the 6502 based SYM, this was done using the SYNC pin, however as already mentioned by others, the 6809 does not have such a pin.

[esarintulo]

If no one objects,i'll follow Jeff's indications as i only seldom used step by step debuging on the Kim1 then preferred the breakpoint method.
Garth,does by chance your addendum contain the 6809 listing ???Much usefull when disassembling binaries !
68b09,68b21 an 68b50 are on their way from China (Grant Searle's 6 chips 6809 sbc was "plan C" and ET-3400 6809 adapter was "plan B".......).
Thanks to all of you,i really do appreciate the way the community behaves !
Rene'.

[GARTHWILSON]

esarintulo wrote:

Garth,does by chance your addendum contain the 6809 listing ???Much usefull when disassembling binaries !

I think you're confusing me for someone else. I have not been involved with the Sym or the 6809. I only tried to get the picture to show up, above.

[dwight]

Looking at the board, it would seem that the fuse ROM on the board
is used to deal with the reset and interrupt vector mapping.
It may not be needed for your application.
Dwight

[andysa]

Sym1_69.pdf

(3.97 MiB) Downloaded 205 times

Attached is the Sym-1/69 Supplement

There was never any disassembly made available to the public, to my knowledge.

[andysa]

Above is my crude reverse engineering attempt at the mod boards glue logic.

Quoting from the manual..... Because the 6809 CPU's do not have SYNC outputs, hardware has been added to the adaptor PCB which will generate an NMI when the following two statements are true: DEBUG is on, and an address is outputted by the CPU which is not in the monitor, I/O or address pages, 00, 01 or FF

[dwight]

Yes, that does look right. I'd missed the wire going
from the fuse PROM to the 7408.
That makes sense.
That should be easy enough to put into a PAL. Is there any indication as to what the other
3 outputs have in them?
It isn't clear how the two phase clock is generated? Does the 6809 split the clock into 4 cycles?
Dwight

andysa wrote:

6502.org wrote:

Image no longer available: https://dl.dropboxusercontent.com/u/103294228/Untitled.jpg

Above is my crude reverse engineering attempt at the mod boards glue logic.

Quoting from the manual..... Because the 6809 CPU's do not have SYNC outputs, hardware has been added to the adaptor PCB which will generate an NMI when the following two statements are true" DEBUG is on, and an address is outputted by the CPU which is not in the monitor, I/O or address pages, 00, 01 or FF

[Dr Jefyll]

dwight wrote:

That should be easy enough to put into a PAL.

Yup. And the info andysa posted will let us infer the contents. "[...] an address is outputted by the CPU which is not in the monitor, I/O or address pages, 00, 01 or FF"

dwight wrote:

Is there any indication as to what the other
3 outputs have in them?

I'm gonna guess they accommodate different mappings of the above -- if that ever happens, which to me seems unlikely. But it cost nothing to put the PC traces there. (I suspect that, as shipped by Synertek, the PROM is blank in those 3 bits, allowing hackers to blast in updates themselves. Just a guess!)

dwight wrote:

It isn't clear how the two phase clock is generated? Does the 6809 split the clock into 4 cycles?

Q and E are generated on-chip (but we don't need Q; for us it's a no-connect). And we can ignore the fact the crystal runs at four times the CPU operating frequency.

For this project all we care about is the E clock output, which is a 1 MHz square wave of 50% duty cycle. It's entirely suitable as a substitute for the 6502's Φ2. And to get E we just hook up the 4X crystal (plus whatever caps etc) and we're off to the races.

(Edits, last 2 paragraphs)

[Martin A]

dwight wrote:

It isn't clear how the two phase clock is generated? Does the 6809 split the clock into 4 cycles?

Looking at the data sheet, the 6809 uses a crystal of 4x the CPU frequency. E and Q seem to be outputs, E is reported to be similar to the 6800 (and I guess 6502 as well) phase 2 clock.

For the 6809E on the other hand, E and Q are inputs for the overlapping clocks. Which freed up the 2 crystal pins for other uses.

[Tor]

Martin A wrote:

For the 6809E on the other hand, E and Q are inputs for the overlapping clocks. Which freed up the 2 crystal pins for other uses.

Same for the Hitachi 63x09 variants: '09P (or nothing): Crystal, E and Q are inputs, or '09E: No crystal, E and Q are outputs. The 6809E was used in the Tandy Color Computers.

[Martin_H]

Tor wrote:

Martin A wrote:

For the 6809E on the other hand, E and Q are inputs for the overlapping clocks. Which freed up the 2 crystal pins for other uses.

Same for the Hitachi 63x09 variants: '09P (or nothing): Crystal, E and Q are inputs, or '09E: No crystal, E and Q are outputs. The 6809E was used in the Tandy Color Computers.

I knew about the P versus E variants, but it always seemed really weird. On a typical circuit board every single part adds cost, so why add the complexity of the E and Q inputs? A single crystal just seems like a smarter design.