6502 Block Diagram

[halkun]

So to better learn the 6502 and to give a little to the community, I decided to update the 6502 block diagram. It was looking ragged as a low-resolution scan of a document from the 1970s anyway. I've updated it to SVG, put it on A4 dimensions and did an export at 300 DPI for you all.

I did a Little spell checking and alignment. It looks so much better now.

I've attached the exported PNG file. Don't quite know where to put the SVG if someone wants it.

Also if you can, check for typos please

== EDIT ==
Fixed the typo in the processor status reguster

== EDIT ==
INC LOGIC (0-3) was missing the dash. Fixed :/

[barrym95838]

PROCESSOR STATUS REGUSTER?

Mike B.

[DerTrueForce]

It seems to be a technical term. I have yet to find anyone who can explain its meaning, apart from guessing at a mis-spell of the word "register".
Somehow, I'm not convinced.
...
Sorry, that's not a very good joke.
In all seriousness, though, this is a good piece of work. That appears to be the only mis-spell in it. I probably won't find this too useful, but I have no doubt that someone will. Also, props for managing to wrangle the SVG editor. When I tried it, I had a hard time getting Inkscape to do what I wanted.

[halkun]

Thanks for the spell check... That one got by me. I was trying so hard just making sure all the signal names were correct, didn't catch the big things

I updated the picture BTW.

[unclouded]

Very nice! I've been thinking for some time that it would be nice to have an editable version of the data sheet to embellish at will

[BigDumbDinosaur]

barrym95838 wrote:

PROCESSOR STATUS REGUSTER?

Mike B.

It's a register that is updated by changes in the accummulus.

[BigEd]

Well done! SVG is good - perhaps as a first step, zip it and attach it here.

Donald Hanson did his own cleanup - he's the author of the original - and you can see it here:
http://www.witwright.com/DonPub/6502-Block-Diagram.pdf

If you got yours and his at the same scale, you could flip between them to find any discrepancies.

I think some zero and one have been written as O and I, but I haven't proof-read either version.

[KC9UDX]

BigDumbDinosaur wrote:

barrym95838 wrote:

PROCESSOR STATUS REGUSTER?

Mike B.

It's a register that is updated by changes in the accummulus.

The kernal makes heavy use of that.

[halkun]

BigEd wrote:

Well done! SVG is good - perhaps as a first step, zip it and attach it here.

Donald Hanson did his own cleanup - he's the author of the original - and you can see it here:
http://www.witwright.com/DonPub/6502-Block-Diagram.pdf

If you got yours and his at the same scale, you could flip between them to find any discrepancies.

I think some zero and one have been written as O and I, but I haven't proof-read either version.

Z is used a "Zero" and O is used to reference the Open Drain Mosfets that shunt the bus lines to ground. If you enable the drain, it technically zeros the bus anyway, so it's kind of interchangeable. I used used for the interrupt flag. There are some confusing ones like the O/ADH0 line, and I double checked that was really what it was. It's shunts line zero of the High Address Bus to ground using the Open Drain Mosfets

At least that's what I'm getting from the diagram.

I used the PDF as a template, but it's not an exact trace. I put my snap-to-grid on high and moves some things for clarity and alignment. If you are careful, you may be able to stretch some of the things around, but it's not as object based as I would have liked it.

I attached the SVG in the zip file...

[BigEd]

Thanks for the SVG! I'll agree that Donald Hanson's original is not always clear about 0 vs O, but I know for sure that signals like
0/ADL0
are using a zero, and not a letter O. It's reasonable, because these control signals place zero on the bus, but also it's true, because I can quote from the original MOS drawings - see attached! (As noted there, I'm not free to publish the scanned data, but I have permission to share excerpts.)

Cheers
Ed

[halkun]

Augh! I can change the font on the SVG to one that puts a marker on the Zero. As of right now the signal lines names are consistent. I'm assuming that the negated lines in your diagram snippet are internal to the decode block.

I would love to re-do the original plans in SVG too, if anything to get them into a digital archival state. I should just break down and get Illustrator, but the fact that it's a monthly charge for the application and that I don't own it really turns me off to it.

[BigEd]

Ah - I didn't even spot the negations! That will be real, and it is the sense of the signals leaving one sheet and passing to the other, but it seems completely reasonable to me that a higher-level description like the block diagram can choose to use the true-sense signals instead.

[BigEd]

BTW, although the MOS schematics are sort of available, the Atari schematics are more freely available - on many sheets. Search for Kevtris schematics.

[jac_goudsmit]

Excellent work! Sorry I don't have time to check for mistakes...

Too bad none of the internal drawings of the 6502 elaborate on the signals that go from the instruction decoder ROM to the "Random Control Logic". I have a good idea of how the instruction decoder ROM works in general, and visual6502.org has (or should have) a table somewhere of all the entries in the ROM, but I wonder how the 130 output lines get reduced to the 62 (?) control lines that come out of the Random Control Logic.

===Jac

[BigEd]

You can explore "the random control logic" at transistor level, either in visual6502 or using Balazs' giant schematic. I believe people have reduced this section to logic equations, but I'm not sure if there's any single source to find them published. The most recent, and perhaps the best, treatment is Andrew Holme's at http://www.aholme.co.uk/6502/Main.htm - there's a link to the Verilog files within.