Arlet wrote:
There are still a bunch of M6833x processors for sale, with CPU32 core. It looks like the CPU32 is much closer to 68000 than the ColdFire.
Fido1100 might be a better choice because unlike the 68332 it has SDRAM interface, unfortunately the documentation has some "potholes",
and it feels like the IC package might be ball grid array in the future.
Also, Fido1100 has five 68k register sets, and if I remember correctly one could switch to another register set if an interrupt hits
(that's one clock cycle interrupt response time... at 60MHz.)
Some years ago we had toyed with that chip at work, but because we were not pleased with the IDE and the documentation,
the eval board had ended up in the trash can.
CPU32, like in the 68332 and the Fido1100, basically
is a 68020 subset, some of the more elaborate 68020 addressing modes are missing,
and I think that there are no FPU instructions (haven't checked).
But the instructions and addressing modes that are there in CPU32 seem to be
100% binary compatible to the 68020.
;---
When ColdFire came out, I took a look at the datasheets and to me it felt like ColdFire is something completely different from 68k.
I'd say, decoding the 68k instruction set ain't easy (sort of an "Origami trick"), so ColdFire was an attemt to have an instruction set
which decodes more nicely, maybe for reducing cost and improving CPU speed.
68000 uses microcode, plus three PLAs for decoding the instruction into a 10 Bit microcode address.
From the 65816 patents, it looks like the 65816 uses only one big PLA (similar to 6502 and 65C02).
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I just remembered the obsolete TMS320C31 DSP from TI.
Instruction set was very different from 68k, of course...
but it had 8 data registers (32 Bit), 8 address registers (24 Bit ?), and 8 floating point registers (40 Bit).
Another neat architecture that went forgotten.
...Long time ago I did a little bit assembly coding for that chip at work.
But it's been too long, and I don't remember much of the details.