I have another small correction. DEC PDP-11 architecture supported BCD but in a very odd form. It provided a special optional co-processor unit (very costly) for this! They were so called commercial instructions.
It was the strange world. IMHO without 6502 and ARM we were forced to live in it.
Tor wrote:
For realtime it would be. And there was one particular device that was very realtime back then, and that was the floppy drive. Realtime in this case means that it has to be fast enough, but if it is, then it doesn't matter if it is even faster. So, the question is really: How long does it take to process 144 cycles? Acorn dismissed both the National Semiconductor and the Motorola offerings for that reason. Steve Furber explicitly mentions the NS one in this interview:
http://cacm.acm.org/magazines/2011/5/10 ... r/fulltext Thanks for this nice anecdote.
Sorry I was inaccurate 144 is the time for the best case. DIVS (signed division) with an operand in memory may take up to 186 cycles. Maybe it had prevented to use the high density floppies with 68000 based Mac, Amiga, Atari.
Tor wrote:
Sophie Wilson has elsewhere mentioned that the 68k had slower interrupt handling than the 6502. Back in the eighties I wrote software for a very realtime bird-monitoring system, lots of interrupts from many sources. The Apple II, or rather, the 6502, had no problems with that.
Agreed, 6502 has fast interrupts. This allows to create the nice demos using different video modes for the each raster line. Z80 based computers missed this. Only z80 at 7-8 MHz had become fast enough for these tricks.
The bird-monitoring system at 6502 looks impossible for me...
How to run it without HDD? Or did it have one or two?
BigDumbDinosaur wrote:
If the NMOS 6502 (and others, such as the 6510) encounters JMP ($xxFF), it will incorrectly load PC with the contents of $xxFF and $xx00, failing to increment the most significant byte (MSB) of the operand to get the MSB of the target address. This error was corrected in the 65C02 and 65C816.
IMHO it is not so easy problem. 6502 has paged architecture. The logic above is too abstract, not practical. I gave the practical example which shows that NMOS 6502 works right and CMOS 6502 wrong. Is there any reversed example? In any way I prefer to use word "quirk" instead of "bug" or "error".
If we have to force theoretical logic then we have to say that addressing modes
(zp,X) and
zp,X are bugs too. 6502 without these "bugs" would have powerful stack manipulation instructions making 65816 stack addressing modes almost redundant.
IMHO "the fix" of JMP for 65C02 looks like the change of one detail only in the big picture full of the similar details.
GARTHWILSON wrote:
in BASIC benchmark after benchmark, the 6502 could outperform the Z80 which had more and bigger registers, a seemingly a more powerful instruction set, and ran at higher clock rates.
I can try to explain this. I was sure that 6502 is 3 times faster than z80 3 years ago. Then I had an opportunity to meet an 8080/z80 expert programmer. He showed me how to write fast z80 codes. It is much more difficult than for 6502. So I am sure now that a good z80 programmer spending enough time may give z80 code which maybe only 2.1-2.2 times slower than the equivalent code for 6502.
GARTHWILSON wrote:
First for 6502:
Code:
LDA (0,X)
PHA
INC 0,X
BNE fet1
INC 1,X
fet1: LDA (0,X)
JMP PUT
; and elsewhere, PUT which is used in so many places is:
PUT: STA 1,X
PLA
STA 0,X
I dare to suggest a better 6502 variant
Code:
ldy #1
stx m+1
m lda (0),y
tay
lda (0,x)
sta 0,x
sty 1,x
So the code for PUT is only 4 bytes and maybe left without JMP too. Of course, 65816 is much better any way: 12 clocks against 26 and 4 bytes against 13.
GARTHWILSON wrote:
Perhaps SWN was one of the things Chuck and Bill considered when designing the '02 and decided it wouldn't get used enough to be worth the silicon real estate. Although I have wished for it, or for an LSR4, it's clear that they did a good job in deciding what to put there, and Bill in the later 65c02 and '816.
They might add it and something else if they got the vision of CPU without BCD and V-flag.
The main question of my dreams is around legendary Chuck Peddle. What IF he had the opportunity to continue the work under 6502? Intel made 8086 at 1978 after 4 years since 8080 was appeared. Motorola were making 68000 during 5 years. Only 80186 (appeared at 1982) or 68020 (1984) might compete the speed of 6502... IMHO if MOSTEC might survive the "shark" attacks then we would have the different reality today. Without BBC Micro, Commodore 64, ... Maybe we could even see the Terminators around.
BigEd wrote:
Bear in mind that different Basics can have quite different performance. Mallard Basic on the Z80 seems especially good.
I am surprised by the slowness of 6809 systems. It looks like that 6502 may outperforms 6809!
Rob Finch wrote:
I just thought I would mention that the Z80(8088) and 68000 aren't as slow as they might seem if one looks only at the clock frequency. Both of these processors use multiple clock cycles to interface to the bus. For instance a Z80 uses four clock cycles per machine cycle when reading instructions, so it's really only running at a 1MHz rate, the same as the 6502. The 68000 uses four clock cycles minimum per bus cycle (reading instructions) while running at 8MHz so it's really only running at a 2MHz instruction fetch rate. It's not really the instruction set that slows things down, but the implementation (bus interface). There are a couple of implementations of the 68000 done in an FPGA for instance that gain back performance by using a simpler single clock bus cycle. These cores get a 4x speedup effectively. Later versions of the 68x series shortened the bus interface to three cycles and gained 25% in performance.
I agree that z80 and 68000 are not too slow but the used frequency is also used by RAM and ROM. So 4 MHz 6502 may use the same memory as 4 MHz z80 without wait states. Commodore 128 could use 4 MHz - it is proven. BBC Micro second processors use even higher frequencies. It is obvious that 6502 at 4 MHz is much faster than z80 at 4 MHz. However z80 may use the wait states to use slower memory and this allowed to have the cheap systems like Spectrum or Amstrad CPC/PCW which have the speed matching 6502 at ≈1.5 MHz.
IMHO z80 had also hidden support from Intel which didn't try to spread its 8085. Microsoft explicitly supported z80. z80 had the common OS (CP/M). 6502 systems were isolated: no common OS, no common disc formats, etc. It was possible to make the common 6502 OS too. It maybe GEOS or the special version of CP/M. This demanded support from the big market players. IMHO Motorola might provide such support...