A few further thoughts on these frequencies:
- they are counts of instructions, not counts of cycles spent in instructions, which is a slight distortion of where the time goes
- with this tracing technology, it's not a big step to investigate how often forward or backward branches are taken, or even split that into the three major branch types: on zero, on carry, on sign.
- some emulators might gain performance by grouping the most common instructions' handling together so they occupy fewer cache lines (even the STM32F4 has a sort of cache)

Can I just thank all the good folks of 6502-land for their work on this;
I hope you're finding it as interesting as I do.



BugBear

This is pretty awesome stuff, actually. I wish I had access to this knowledge when writing my 'e' RISC-V emulator.