Hi again Peter. Your remark about the '816 not violating its own requirement has jogged my thinking -- thanks! Certain info in the datasheet is implied, and for me in this case it fills in the blank -- the WDC doc
does contain all the necessary detail for managing the break-before-make business. I thought the WDC datasheet had an error or omission, but we all know THAT never happens!
cbscpe wrote:
if you look at a 65816 system you can assume that only one peripheral device (RAM, IO, ROM, ....) will have it's chip select asserted and that will be the only one involved in a contention situation with the data bus of the CPU.
Agreed -- only one peripheral device at a time. What I meant to get at is, any device that wants to talk to the '816 without contention must play nicely -- its outputs need to walk the walk regarding the
min &
max times required to enable, and the
min &
max times required to disable.
With '816, avoiding contention is a bothersome business, and I'm not saying every situation demands it -- it's not a judgment. Anyway, as I see it the options are:
- Using a transceiver you need to...
- Determine when the transceiver's OE cue will arrive, then select a '245/equivalent ('HC245, 'AC245, CPLD?) that can respond in a timely fashion. ("Timely" meaning those four specs are met). Memory & I/O also have specs to meet, but those specs are far more forgiving because Ø2-low is all dead time on the non-multiplexed part of the bus. (The 'C02 data bus is easy for the same reason.)
- Omitting the transceiver you need to...
- For the ROM, determine when its OE will arrive then select a product that can respond in a timely fashion
- For the RAM, determine when its OE will arrive then select a product that can respond in a timely fashion
- For I/O device A, determine when its OE will arrive then select a product that can respond in a timely fashion
- For I/O device B, ...
Despite all the rigor, omitting the transceiver is still appealing, especially for a ROMless sytem with minimal IO.
cbscpe wrote:
I argue that a '245 produces even more noise. [...] '245 is worse than any peripheral, this beast is a high current bidirectional buffer/Driver with a very low output impedance
I agree the point re low output-impedance may be quite important. Contention is only as bad as its strongest participants! So when deciding whether contention can be tolerated it's worth considering that an 'HC245 or 'AHC245 will result in less Vcc noise than an 'AC245. (OTOH if you've done the homework and satisfied the timing specs then there'll be no contention, and low output impedance is a non-issue.)
cbscpe wrote:
I always thought that it is a pitty that there is no 65C816 with a non multiplexed address bus
I feel the same way. The 65c265, which includes an '816 core, has a non multiplexed address bus, but the speed rating on the '265 is only 8 MHz.
cheers,
Jeff
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In 1988 my 65C02 got six new registers and 44 new full-speed instructions!
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