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 Post subject: Re: 6502, Φ2, etc.
PostPosted: Thu Jul 02, 2015 5:49 pm 
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ArnoldLayne wrote:
BigDumbDinosaur wrote:
ArnoldLayne wrote:
Hi, this is basically what the WDC 65c02's datasheet is stating. So, you are saying that this not only goes for WDC but for 65c02 in general?
I'm asking because I did not find anything about this in the Rockwell datasheet.

This is design advice from WDC...

Hm, then I should be able to leave that jumper always in WDC position.

Yes.

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 Post subject: Re: 6502, Φ2, etc.
PostPosted: Wed Jul 15, 2015 6:03 am 
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BigDumbDinosaur wrote:
Incidentally, here is the Ø2 clock generator circuit I use.
Attachment:
clock_gen.gif


Hmm - at least datasheet of my NMOS 6509 says it wants to have a full rail clock. (It actually seems to work w/ TTL level clock.) Is your circuit only for CMOS CPUs or is it also intended for NMOS w/ full rail clock? :?:


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 Post subject: Re: 6502, Φ2, etc.
PostPosted: Wed Jul 15, 2015 8:02 am 
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(I note that the 6502 launched at a 20% price premium for including the on-chip clock generator. The 8080 needs a 9V clock... clocking was hugely inconvenient prior to the 6502.)


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 Post subject: Re: 6502, Φ2, etc.
PostPosted: Wed Jul 15, 2015 9:32 pm 
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Hobbit1972 wrote:
BigDumbDinosaur wrote:
Incidentally, here is the Ø2 clock generator circuit I use.
Attachment:
clock_gen.gif

Hmm - at least datasheet of my NMOS 6509 says it wants to have a full rail clock. (It actually seems to work w/ TTL level clock.) Is your circuit only for CMOS CPUs or is it also intended for NMOS w/ full rail clock? :?:

The 74AC74 flip-flop can swing Q and /Q from Vcc to ground and source or sink up to 24 ma. It should work fine with the 6509. You could also use a 74ABT74 instead of the 'AC74 to get more drive, but that's probably not necessary in your application.

Incidentally, if you need a Ø1 output along with Ø2 you can derive the former from the /Q pin on the flop. Ø1 and Ø2 will be exactly 180 degrees out of phase with each other.

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 Post subject: Re: 6502, Φ2, etc.
PostPosted: Wed Jul 15, 2015 10:15 pm 
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BigDumbDinosaur wrote:
The 74AC74 flip-flop can swing Q and /Q from Vcc to ground and source or sink up to 24 ma. It should work fine with the 6509.
I agree with BDD that AC series parts are an excellent choice for a clock circuit. But the 6509 is an odd bird, unlike other 65xx CPUs in that it requires two separate, non-overlapping clocks -- at least that's what the datasheet says. :roll: (The 6800 is like that, too, IIRC).

Somewhere I saw the clock circuit for the CBM-II (?), which is a 6509 machine. It used two TTL logic gates cross-coupled in a manner that avoids overlap, and low-value pullup resistors to ensure adequate logic-high voltage levels. I suggest you adopt the same circuit, but using 74AC (and omitting the pullups).

-- Jeff

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 Post subject: Re: 6502, Φ2, etc.
PostPosted: Thu Jul 16, 2015 2:47 am 
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Dr Jefyll wrote:
I agree with BDD that AC series parts are an excellent choice for a clock circuit. But the 6509 is an odd bird, unlike other 65xx CPUs in that it requires two separate, non-overlapping clocks -- at least that's what the datasheet says. :roll:

Right, forgot about the weird clock requirements, which are clearly shown on the timing diagram (attached). :roll:

Attachment:
File comment: MOS 6509 Read Timing Diagram
6509-04.gif
6509-04.gif [ 84.46 KiB | Viewed 744 times ]
Attachment:
File comment: MOS 6509 Write Timing Diagram
6509-05.gif
6509-05.gif [ 77.76 KiB | Viewed 744 times ]
Attachment:
File comment: MOS 6509 AC Characteristics
6509-06.gif
6509-06.gif [ 150.38 KiB | Viewed 744 times ]

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 Post subject: Re: 6502, Φ2, etc.
PostPosted: Thu Jul 16, 2015 5:03 am 
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Dr Jefyll wrote:
I agree with BDD that AC series parts are an excellent choice for a clock circuit.

Till now I use a SN74ALS02N... let's see what's in my storage box... *rummaging through arsenal*... hmmm... :( ...I even don't have another '02 of any kind... so the ALS will have to do.... and I should add the pull-ups then.

Dr Jefyll wrote:
Somewhere I saw the clock circuit for the CBM-II (?), which is a 6509 machine. It used two TTL logic gates cross-coupled in a manner that avoids overlap, and low-value pullup resistors to ensure adequate logic-high voltage levels. I suggest you adopt the same circuit, but using 74AC (and omitting the pullups).

You probably mean CBM-500 and CBM-6xx or "b-model": http://www.zimmers.net/anonftp/pub/cbm/schematics/computers/b/index.html
It uses 2xNOR to generate the non-overlapping clock. I copied my clock circuit from there (but somehow the resistors didn't make it to my breadboard...)


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 Post subject: Re: 6502, Φ2, etc.
PostPosted: Thu Jul 16, 2015 5:46 am 
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Attachment:
6509 clock driver.gif
6509 clock driver.gif [ 21.86 KiB | Viewed 736 times ]
Right, thanks -- this is the part I remember (from this page).

Pin 13 and pin 10 of the 'S02 NOR drive Φ1 and Φ2. And the cross coupling guarantees the "non-overlapping" behavior. Pin 13 must finish going low before pin 10 can go high, and vice versa.

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