SyMon 5

[floobydust]

I finally starting coding up an enhanced version of Brian Phelp's SyMon III code. I've opted to change the version to 5 as the changes are so numerous and the code so reworked that little of the original remains. The main component that is still there is his S/O/S assembler code, which I've heavily updated to use 65C02 instructions and be easily removed/replaced. I've also introduced a standard BIOS which can be used independently of the monitor code. I've included the quick reference text here which shows all commands, etc.. Some new commands include a memory compare function and the ability to write to the EEPROM in situ, provided the hardware supports it (my CPU board has a RO/RW jumper). The core code is based in ROM and supports the Atmel 28C series EEPROMs. The core routine which writes to the ROM gets copied to page 0 (19 bytes) and does a single byte write and uses the Toggle bit to verify write completion, then goes back to ROM code to validate with a compare afterwards. You can even copy from one ROM location to another. I'm restructuring the code a bit yet... sort out the messages, etc. Total code size is 7424 bytes. Once I clean the source code up a bit, I'll post it as well for others to try. So far, I've had a couple board sets running at 4MHz for over 90 days without a crash.

[floobydust]

Source code attached here. Any feedback appreciated of course

FYI, I'm using the recent download of the WDC tools which was recently made free

[scotws]

Okay, that's a lot of code at once -- I can see I'll be coming back to it to read various special parts, especially because it is for the 65c02, which is rare. Thank you!

I'm curious about one thing I noticed while going over it just now: There seems to be lots of code for BCD. Is this something that anybody here actually uses? Wouldn't that be something to cut out?

[GARTHWILSON]

Quote:

especially because it is for the 65c02, which is rare.

??? The 65c02 is in current production, and is available from lots of distributors. The NMOS 6502 has not been made in decades.

[Tor]

I read it as 'code for the 65c02, which is rare'. I.e. rare code.

-Tor

[scotws]

Sorry, Tor's right, my bad. The 65c02 CPU is of course all over, but most people seem to program stuff for the 6502.

[floobydust]

The only routine for BCD, are to support the J command which provide a quick easy conversion from Decimal to Hex (H command does the reverse). If you don't want those commands in the monitor, you can easily remove the code and save some space. Other than this one routine, there's no use of BCD in the monitor or BIOS.

The main idea was to leverage the additional opcodes and addressing modes of the 65C02 instructions which does allow for smaller and faster code in many cases. As a result, this code requires a 65C02 CPU and will not run on any older 6502 processors. As the W65C02 is still in production by WDC, it's no problem to build newer systems which will easily run the monitor program. I've tested the code extensively on WDC's chips (W65C02, W65C51, W65C22) and it works very well.

I've been using my small 2-board system to develop, test and run the code. Clock speeds I've tested are from 2MHz to 10MHz with no issues. You do need to manually update the 65C22 timer values based on the tables provided in the source code and change the BIOS message to reflect the proper clock rate. This is all in the BIOS section at the bottom section of the code.

With the exception of the the top page ($FF) everything including the I/O page can be easily relocated so it can be flexible with other systems, so long as they meet the minimal criteria of the 65C02 processor and a 65C51 UART (65C22 is used for all timer and delay routines).

[bartleph]

Hi All. Ive been playing with Cyclone 2 FPGAs and Grant Searle's excellent VHDL UK101 source. I would dearly love to have a version of SysMon running on that platform, and up till now have been working to achieve that with SysMon3. Unfortunately instead of using an emulated 6551, Grants VHDL code uses a 6850 ACIA. I have been trying unsuccessfully to convert SysMon3 to work with my 6850 as I really dont have the skills to build a VHDL 6551. I can put the 6850 at any address and for SysMon3 I have it at $8000 and $8001 (only two mem locations needed for 6850 whereas 6551 uses 4). I'm initialising the 6850 with:

Code: Select all

        LDA     #$03
        STA     ACIA
        LDA     #$11
        STA     ACIA
        RTS

and Output is:
        PHA
L1:    LDA ACIA
        LSR A
        LSR A
        BCC L1
        PLA
        STA ACIA+1
        RTS

Input should be:
        LDA ACIA
        BEQ Out
        LDA ACIA+1
        RTS
Out:

As the 6551 is being triggered by an Interrupt in Symon and I cannot modify my 6850 VHDL I guess the Input routine should be in a loop somewhere, but I am unable to figure out where. Any help or comments will be gratefully received..Thank you.