Ive been attempting to make a SNES cart containing a bunch of classic music. Doing this I need to wire this like it's a multi cart so I can seperate the banks. What I've done in the past is hijack the top 2 address pins of the maskrom and run them through a binary counter. This made it so the machine would only read 1/4 of the chip at any given time. If press reset and it would go to the next 1/4 and so on. But that's not working here.

I've got a multi memory IC M59PW1282-100 it is a 128Mbit IC. I tried doing the same thing as before but all I got was a random selection of the Roms. It would not select in order and after about 20 cycles it would stop switching altogether.

My problem is that I don't understand enough about the IC I'm using. The IC is constructed unsung two 64 Mbit banks that are stacked. I thought running a low pass filter would help but it hasn't helped. But then again , maybe I don't have the correct size
Of low pass filter. And I'm not good enough to figure out exactly what size resistor or capacitor I need for this.

Does anyone have any experience with this? Or with this chip?


Many many thanks in advance for any advice.

That's an odd chip, at least in my experience. "Two memories stacked in a single package" ??? Datasheet attached.

Cool! -- and the binary counter got its clock input from reset? But I take it your previous efforts didn't use this particular memory chip. Is that right?

Two things strike me right away about the M59PW1282. It's rated for use with a 3.3V supply, whereas I would've guessed the SNES uses 5 volts. Am I mistaken about that? Also, this chip is arranged as 16M x 16 bits -- IOW, it seems you would have 8 data lines left unused after connecting to the SNES's 8-bit data bus. Am I missing something, or is there more you need to explain?

cheers,
Jeff

_________________
In 1988 my 65C02 got six new registers and 44 new full-speed instructions!
https://laughtonelectronics.com/Arcana/ ... mmary.html

Yes. The chip is 3.3v where as the board is 5v. I overcame this by using a voltage reducer. I've got a steady 3.3v to the chip. I also attached resistors to the address lines , not the data lines to reduce them from 4v to 3v.

As far as I know all of the address lines are used. I'm not sure what your referring to.


Thanks again.

And yes. The reset line was ran to the clock input of the binary counter. I use a 74LS161

I've actually got the setup to select through all of the tracks once. But it wouldn't do it in any order. It would jump around. I don't understand why. Maybe a power surge? That's why I was attempting the low pass filter.

Another bit of info is it seems that with different variations of power the chip will select differently. Like when I tried the filter. It would select track 4. No filter it would select track 2 , a filter with 2 resistors would select track 3.

Just thinking out loud here. Maybe the it needs power to select between tr upper and lower banks. I'm not sure.

Are you able to post a circuit diagram? Just putting resistors in the line might prevent damage but the RC time constant with the resistance and the load capacitance might be too long for it to work at the chosen clock speed, unless you also put a capacitor, something in the range of 10-22pF, across the resistor feeding the address lines. Are the other pins (not just address lines) safe?

_________________
http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?

I asked another board member ( diff. Board) about his use of this chip while he was attempting to make a snes multicart and this was his response.

"idid get it to work.
I conected two switches
one connected to A21 and one connected to A22.
So that every combination would select a part.

A22 - A21 - PART
GND - GND = part 1
GND - 5V+ = part 2
5V+ - GND = part 3
5V+ - 5V+ = part 4 "


I'm trying to do this without using switched though.

Yes, the address lines were the only lines that registered voltage. The data lines didn't register

Um, yeah... but it's not that simple. First, the 3.3V supply can get dragged up to 4V or more due to current travelling in through the resistors. It may be steady only when most of those resistors bear a logic low, but a bunch of simultaneous logic highs could result in the 3.3V supply rising too high. That's because the address inputs have protective diodes that shunt excessive voltage to the chip's supply.

What's the value of the resistors? It's also possible (as Garth said) they're producing excessive RC delay.

The other issue -- assuming the 3.3V supply doesn't rise too high -- is that bytes read from the memory onto the data bus will have a logic "high" of only 3.3V. That's acceptable for many CPU chips (those specified to accept TTL input levels) but the 65C816 in the SNES is NOT specified to accept TTL input levels. The result is hard to predict, but could include good operation, no operation, or intermittent operation.

I was asking about the data lines. This chip has 16. The SNES data bus only has 8.

Can you post a link or schematic, even if it's a previous rendition of this project? Glad to help, but really I'm guessing too much about what you're doing.

-- Jeff

_________________
In 1988 my 65C02 got six new registers and 44 new full-speed instructions!
https://laughtonelectronics.com/Arcana/ ... mmary.html

Gotcha , the extra data lines are ran through some 74LS257's and combined. I don't have a schematic but it is just about the same as this.

http://sega4ever.power-heberg.com/tutod ... pinout.jpg

And the resistor values I asked about? Details of your 3.3V supply might also be helpful (to determine if it'd resist getting pulled above 3.3V, I mean).

I hope the '161 is powered by 5V, not 3.3V. Just checking! But honestly you don't seem to realize we're working in the dark. Work with us on this please!

_________________
In 1988 my 65C02 got six new registers and 44 new full-speed instructions!
https://laughtonelectronics.com/Arcana/ ... mmary.html