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PostPosted: Mon Jul 21, 2014 10:00 am 
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Hey,

After quite some research, I've come up with a first schematic for my "i6502" project. It's still missing the 6522 VIA, which I'll add later. This schematic contains a W65C02S, 32kB RAM (all used $0000-7FFFF), I/O (not yet included, $8000-BFFF) and 32kB EEPROM (16kB used, $C000-FFFF).

I've included a reset switch (no IC yet, maybe later), a decoupling condensator for the 6502 and a 4Mhz crystal.

The addressing logic is quite simple IMHO. A15 and Phi2 are used for CE and OE on the RAM, A14 is brought in to select between IO and ROM. I was thinking of using a 74HC138, but this seems simpler to me.

Here's the full schematic. As I'm new to this, I'm very keen to hearing your feedback on the i6502 design in particular and tips for creating better schematics in general.

Next steps: add 6522 I/O, wait for parts to get delivered and build it!


Attachments:
File comment: 16502-mk1-a schematic
i6502-mk1_schem.png
i6502-mk1_schem.png [ 303.2 KiB | Viewed 3168 times ]

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PostPosted: Mon Jul 21, 2014 11:07 am 
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Hi, Nice simple design!

I would advise to enhance/debounce/power on reset, the reset button circuit. A dedicated IC would make this easy, but have a look at the 6502 datasheets or other simple designs for ideas with discrete logic.

Look for example at http://retro.hansotten.nl/index.php?page=beta-computer for a simple schmittrigger 74xx14 design.

The other ports in that IC could be used for a cpu clock. Or use a can 4 MHz oscillator for a troublefree clock with small footprint and no extra parts required.


Last edited by HansO on Mon Jul 21, 2014 11:36 am, edited 3 times in total.

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PostPosted: Mon Jul 21, 2014 11:10 am 
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I use Eagle (free edition) to draw schematics. The free edition is limited in board size, but fine for large circuits.


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PostPosted: Mon Jul 21, 2014 11:42 am 
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HansO wrote:
Hi, Nice simple design!


Thanks!

HansO wrote:
I would advise to enhance/debounce/power on reset, the reset button circuit. A dedicated IC would make this easy, but have a look at the 6502 datasheets or other simple designs for ideas with discrete logic.


True. I read http://lateblt.tripod.com/6prj1pic.htm and this guy seems to have no problems using the button. I'm going to try this first, and integrate a 74xx14 maybe later.

HansO wrote:
The other ports in that IC could be used for a cpu clock. Or use a can 4 MHz oscillator for a troublefree clock with small footprint and no extra parts required.


Uhm, I have no clue what you mean here. A 4Mhz Can Oscillator is something different from the 4Mhz crystal I use now, right? How would that work with the 74xx14? I'll have to dig into that :-)

I used Fritzing for this first design. I have no clue on how to operate Eagle yet, another thing on my To-Learn list.

PS. Groeten uit Son en Breugel :-)

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PostPosted: Mon Jul 21, 2014 12:16 pm 
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ariejan wrote:
HansO wrote:
Hi, Nice simple design!


Thanks!

HansO wrote:
I would advise to enhance/debounce/power on reset, the reset button circuit. A dedicated IC would make this easy, but have a look at the 6502 datasheets or other simple designs for ideas with discrete logic.


True. I read http://lateblt.tripod.com/6prj1pic.htm and this guy seems to have no problems using the button. I'm going to try this first, and integrate a 74xx14 maybe later.

HansO wrote:
The other ports in that IC could be used for a cpu clock. Or use a can 4 MHz oscillator for a troublefree clock with small footprint and no extra parts required.


Uhm, I have no clue what you mean here. A 4Mhz Can Oscillator is something different from the 4Mhz crystal I use now, right? How would that work with the 74xx14? I'll have to dig into that :-)

I used Fritzing for this first design. I have no clue on how to operate Eagle yet, another thing on my To-Learn list.

PS. Groeten uit Son en Breugel :-)


Hoi ArieJan,

With a can oscillator you replace the 74xx circuit (IC, Crystal, resistors, capacitors) with one small black box.

(I passed Son en Breugel this morning, driving from Eindhoven back home, so we enjoy both this rainy monday!))


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PostPosted: Mon Jul 21, 2014 2:44 pm 
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You mentioned the addition of a 6522.

That will open the door to many ways of communication like a software UART, parallel I/O etc.


Any other plans to communicate with the computer? A serial port would be very handy for some debugging.


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PostPosted: Mon Jul 21, 2014 3:05 pm 
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HansO wrote:
You mentioned the addition of a 6522.

That will open the door to many ways of communication like a software UART, parallel I/O etc.

Any other plans to communicate with the computer? A serial port would be very handy for some debugging.


I read somewhere that I can use a 6551 to setup serial comms. Using a FTDI cable I should be able to attach some serial port via USB to my computer. I think I have one of those lying around from the time I played with Arduino.

For now I want to get a proper schematic up and running and add more feature from there. Tried Eagle for an hour or so, but it looks like I have to create my own library of parts first. Still not sure it's worth the time investment over Fritzing.

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PostPosted: Mon Jul 21, 2014 3:58 pm 
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A14 of your EPROM should be connected to either gnd (using lower half) or vcc (using upper half). The rest looks great.

Daryl

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PostPosted: Mon Jul 21, 2014 4:16 pm 
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Ruud Baltissen, http://www.baltissen.org/ , draws everything with Eagle also and has a nice libray here: http://www.baltissen.org/newhtm/schemas.htm


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PostPosted: Mon Jul 21, 2014 4:20 pm 
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I read somewhere that I can use a 6551 to setup serial comms. Using a FTDI cable I should be able to attach some serial port via USB

That will do fine. Note that the 'old' 6551 is limited to a 1 MHz, the B to 2 MHz. The WDC current 6551 seems to be broken, if I read the notes on this site.


Last edited by HansO on Mon Jul 21, 2014 5:17 pm, edited 2 times in total.

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PostPosted: Mon Jul 21, 2014 4:35 pm 
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It looks like you're off to a good start. Be sure to go through the 6502 primer which starts at http://wilsonminesco.com/6502primer/index.html and has 22 sections covering a wide range of considerations.

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PostPosted: Mon Jul 21, 2014 6:12 pm 
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ariejan wrote:
After quite some research, I've come up with a first schematic for my "i6502" project.

Nice basic design. I did note a few things for you to consider:

  1. You have the MPU's VPB (vector pull) pin grounded. VPB is an output that is normally driven high, going low only when an interrupt vector is fetched. As connected, it is likely that your MPU will be damaged when you apply power. VPB should be a "no connect" in your application.

  2. The MPU's BE (bus enable) pin must be pulled high. Letting it float as you presently have it puts the MPU into an undefined state, and most likely, nothing will appear to work.

  3. You have the MPU's RDY pin tied to VCC. RDY is bi-directional and will be driven low when a WAI instruction is executed. As connected, you'd have the MPU trying to sink your power supply when WAI is executed. Connect RDY to VCC with a 3.3K resistor to correct this problem.

  4. Capacitor C2 should be shunted by a 0.1µf MLCC. Both capacitors should be as physically close to the MPU's VDD pin as possible.

  5. Aside from the MPU, all chips should be bypassed with 0.1µf MLCCs. Bypass capacitors should be placed as physically close to chips' VCC connection as possible.

  6. As noted by others, the EEPROM's A14 input should be grounded.

  7. Take a look at the Maxim DS1813 reset generator, which neatly handles the system reset situation.

  8. As Hans suggested, generate your Ø2 clock with a can oscillator. You'll end up with a smaller overall footprint and a more reliable Ø2 clock source.

  9. Addresses should not be qualified with the Ø2 clock. The address bus is always valid with the 65C02, even during intermediate cycles. Using Ø2 to qualify addresses is a common 6502 design error and if applied to 65xx I/O silicon, e.g., the 65C22, will result in no I/O operation. These devices require that all control inputs, meaning chip selects, register selects, etc., be valid before the rise of Ø2.

  10. The /OE and /WE inputs to the Cypress SRAM should be qualified by Ø2 so that they are asserted only when Ø2 is high. The data bus contains undefined content when Ø2 is low. Note that this qualification must not be used with the 65C21, 65C22 and 65C51, as these devices are synchronous to the Ø2 clock.

    As a note, simultaneous assertion of /OE and /WE may result in an undefined state in some devices, which a careful read of the data sheet should reveal. I tend to play it safe and arrange the read/write logic so one or the other is asserted, but not simultaneously both. This is readily accomplished with simple glue logic.

  11. Unused inputs on glue logic (e.g., the 74HC00 NAND) must be terminated, either to ground or to VCC. Allowing them to float will introduce noise into your circuit.

  12. Per WDC recommendations (data sheet, section 3.8 on page 10 and note 2 on page 26), the PHIO1 and PHIO2 outputs of the MPU should not be used (that is, they should be "no connects"). All timing should be referenced to the Ø2 clock generator only. PHIO1 and PHIO2 exist to allow the 65C02 to be used in circuits originally designed for the NMOS 6502.

  13. VCC and VSS on the Cyprus SRAM aren't connected. Is this an oversight?

Edit: Fixed a typo where I incorrectly said /CE when I meant /WE.

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Last edited by BigDumbDinosaur on Tue Jul 22, 2014 6:02 am, edited 1 time in total.

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PostPosted: Mon Jul 21, 2014 7:36 pm 
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BDD raises many valid points,especially if you plan to use the WDC 65C02 part.

The 6502 has gone trough many revisions:
  • NMOS 6502, 6522, 6532 (only the now extreme rare early ones had the ROR bug!) 1 or 2 MHz clock max
  • CMOS 65C02, 65c22 more instructions, lower power, still pin compatible also 1, 2 or 3 MHz, very easy to work with, as Garth often says: you can get away with murder!
  • WDC 65C02, WDC 65c22 the current one upto 14 MHz, not complete pin compatible, needs good clock and no errors with glue logic (propagation time etc)


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PostPosted: Tue Jul 22, 2014 6:11 am 
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HansO wrote:
BDD raises many valid points,especially if you plan to use the WDC 65C02 part.

The 6502 has gone trough many revisions:
  • NMOS 6502, 6522, 6532 (only the now extreme rare early ones had the ROR bug!) 1 or 2 MHz clock max
  • CMOS 65C02, 65c22 more instructions, lower power, still pin compatible also 1, 2 or 3 MHz, very easy to work with, as Garth often says: you can get away with murder!
  • WDC 65C02, WDC 65c22 the current one upto 14 MHz, not complete pin compatible, needs good clock and no errors with glue logic (propagation time etc)

Also, two versions of the WDC 65C22 exist, the W65C22N with an open collector IRQ output and current limiting resistors on the data pins, and the W65C22S with a totem-pole IRQ output and no current limiting resistors. The latter is recommended for new designs.

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PostPosted: Tue Jul 22, 2014 7:34 am 
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@BigDumbDinosaur thanks for your comments! I'm going to walk through them one by one today and see how I can fix each one of them properly.

I have already ordered some W65C02S's and W65C22S's via eBay, thanks for the tip @HansO! I think those are the most difficult to get here in The Netherlands, all the other glue (74xx) should be pretty straight forward.

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