Instruction Caching

[aaronmell]

Does anyone have any good article of information on getting a simulator to cache instructions between branching logic?

I have general idea about it, but I am not sure how to handle changing state, and interrupts.

[BigEd]

Sounds like you're thinking of dynamic recompilation, where you transform straight-line sections into some efficient representation, maybe even native code?

If you search with those terms, you should be able to find some good articles. Here are some I found:
http://www.altdevblogaday.com/2011/06/1 ... er-part-1/
http://fms.komkon.org/EMUL8/HOWTO.html#LABD

Cheers
Ed

[TMorita]

Your question is too vague to be able to deduce what you're attempting much less offer an useful advice.

Toshi

[BigEd]

aaronmell wrote:

... I am not sure how to handle changing state, and interrupts.

If you've converted some straightline code to a faster implementation, and you want to handle an interrupt occurring part-way through that code, I think you'll need
- to account for the total clocks in the code
- notice that the interrupt fired during the code
- restore the machine state to what it was before the code
- emulate the code opcode-by-opcode until the cycle where the interrupt happens.
Or, if you don't need to be cycle-accurate, just handle the interrupt at the end of the straight-line section.
Ed

[aaronmell]

BigEd wrote:

Sounds like you're thinking of dynamic recompilation, where you transform straight-line sections into some efficient representation, maybe even native code?

If you search with those terms, you should be able to find some good articles. Here are some I found:
http://www.altdevblogaday.com/2011/06/1 ... er-part-1/
http://fms.komkon.org/EMUL8/HOWTO.html#LABD

Cheers
Ed

That first article had enough information in it to explain what I was missing. Thanks!