Working with Xilinx BGA packages

[ElEctric_EyE]

enso wrote:

...so I put down two pads and will drill it myself...

I see now from another project board I had made for the JTAG connector, the holes are plated through just like the smaller vias. Probably to help with the soldering of a connector for example. But we don't need connectors here, nor do we need mass manufacturing.
We will have to drill it ourselves.

[enso]

We are both quite mad, you know!

Golden Phoenix will do unplated holes, listed in a separate drill file.

My plan is far less ambitious than yours, E-Eye. I will stick with a two-layer board, stuff the holes with caps, and put a layer of paste over the top to hold them in. Then I will flip the board and paste over the bottom. The surface tension should keep the caps centered in the hole. This step may require using the oven. I may just do everything in the oven - after PID-controlling it.

Alternatively, the cap-stuffing part can be done in the oven, followed by the hotplate for the BGA.

[GARTHWILSON]

I would experiment with the in-hole capacitors before adding the BGA. I've done quite a few of them now for my modules, and I still don't do it right every time, so I have to correct it. I go one cap at a time, and measure the VDD-GND capacitance each time, so if there's an open or a short, I don't have to wonder which one it is (since it's obviously the last one I worked on).

[enso]

GARTHWILSON wrote:

I would experiment with the in-hole capacitors before adding the BGA...

Wise words. The board I ordered is for a 0.5mm QFP. Of course I want to put the caps under the chip, so the success hinges on being able to apply just enough paste to keep the cap soldered without bulging out. I will have to fine-tune the stencil to be just the right size.

Sticking caps into holes under a BGA is a whole other project... I'll see how this one goes first.

[enso]

Here is the back view of my XC3S50 LQFP board showing the pads that will be drilled for caps:

emb.back.png (9.64 KiB) Viewed 2977 times

The top layer, under the '50 is a ground plane. You can see the concentric circles of the three power supplies. This should provide clean decoupling.

The layout is certainly much neater than having all those caps sitting on the surface...

[ElEctric_EyE]

For a QFP package I wouldn't think bypass capacitor placement is as bad as it is for a BGA since all the power leads are at the edge. For the BGA, most of the powers originate at the center of the device while the grounds are closer to the edges. The bypass cap's I've seen on Digilent boards, for example, surround the device. Think of the length of wire needed to connect this...
In my parallel video board using a 144-pinQFP, every single one of the power lead bypass caps are <= 2mm distance from the package. I see no advantage to "burying" a bypass cap for a QFP package that is expected to run <200MHz.

[enso]

ElEctric_EyE wrote:

... I see no advantage to "burying" a bypass cap for a QFP package that is expected to run <200MHz.

Agreed, no point other than getting the details worked out with a simpler technology. The only inaccessible area is the top groundplane under the the QFP so the chances of a hard-to-diagnose failure are low.

I needed to quickly test and fine-tune the process, and the 'neatness' factor made it irresistible...

[ElEctric_EyE]

Arlet wrote:

Be aware that IR thermometers don't work well on aluminum, at least not without adjusting. I'd put an empty PCB on the hotplate, and measure that instead.

Very interesting. I did a test today, my lights were pulsing dimming. Erroneous reading the bare Al at 70C throughout this test, while the TC was @250C, where I had PID controller set. I used an old board with a defunct 144-pin QFP Spartan 6. It was soldered using 62/36/2 silver bearing solder, and was easily removed when the IR measured 175C. 179 is the actual M.P. Took about 10 min's to get to that temp. Moving the part of the board where the device needed to be removed directly over the heating element sped up the process. The board seems to have survived the process without any change, it had just begun starting to smoke though, this may have been the flux though, hard to tell.

[ElEctric_EyE]

So I am eager to start production of my 3D bypass capacitor board, each .67"x.67" board will have 62 holes. Each of those holes will be a .056" via with a .029" hole. The 0605 caps will be a snug fit, since they are .065"x.032". Some things I have to consider are the number of holes per board. Max is 650 for ExpressPCB ProtoPro 2 layer service, the one that can't exceed 21sq". Which real estate is not the issue here, number of max hole is the limiting factor. So I can have multiple bypass cap boards on a single manufactured board. Looks like about 10. I will use extra holes remaing to make separation easier. $166 will get me 4x10 boards. I have to get the measurements correct the first time! I may have to go with the .065" via with the .035" hole.

The Green is usually the bottom layer, but in this case it is on top for the bypass cap board on the left. The red layer will have to be etched off, and all the VCC power holes will have to be drilled. The GNDs will have wires to go through both boards.
Ignore the error on the pic, this was just a rough draft.

[GARTHWILSON]

Quote:

Each of those holes will be a .056" via [pad?] with a .029" hole. The 0605 [0603?] caps will be a snug fit, since they are .065"x.032" [...] I have to get the measurements correct the first time!

Make sure you measure diagonally across the capacitor, and measure several since there will be a tolerance. Also, make sure you take into account the tolerance on finished hole size in the manufactured board. I'm sure you'll need to specify a bigger hole than .029.

[ElEctric_EyE]

GARTHWILSON wrote:

...I'm sure you'll need to specify a bigger hole than .029.

Keep in mind those (VCC) holes will have to be custom drilled to get rid of the 2 layer short inherent to the 2-layer manufacturing process with the company I'm dealing with.

[ElEctric_EyE]

OK I have it figured out! I am jumping the gun, so to speak, as I don't even have a BGA board designed yet, but this topic of layered boards is very intriguing and something I must conquer immediately. I think it's going to work. I've triple checked pins and the design has been accepted by ExpressPCB. 620 holes vs. the 650 hole limit on ProtoPro 2-layer service.
The green layer should be manufactured with no solder mask.
The red via's are .031" with a .014" hole.
All I should need to do is drill each hole out at least to .031". Ideally, this will leave no conducting material on the bottom side mating to the bottom of the 256-ball BGA mainboard.

EDIT: Added details.

[Arlet]

If the capacitors don't fit, don't force them, but use a bigger hammer.

[ElEctric_EyE]

Arlet wrote:

If the capacitors don't fit, don't force them, but use a bigger hammer.

They will fit, absolutely.
Although I will change my mounting process, based on observation from the hotplate construct.
Real world measurements:
for 0603 SMT are .032"x.064".
board thickness is .056", so the cap will protrude by some miniscule amount vertically. (This is a clue how I plan to mount this bypass cap board with a hotplate)

Horizontally, you're talking about the [Pb] scraping off the sides by placing 0603 SMT in a human drilled .031" hole and this is guaranteed to be just a little bit larger with custom drilling. I've not purchased the drill bits yet, but it shouldn't be a problem.

EDIT: 6/25/13 Order placed.
EDIT: 6/26/13 Not yet!

[GARTHWILSON]

Quote:

Real world measurements:
for 0603 SMT are .032"x.064". [...] by placing 0603 SMT in a human drilled .031" hole

How thick is the capacitor? The diameter of the hole needs to be at least SQRT(W²+H²), H being the height, or in this case, thickness. So if it's .032"x.025" for example, you'd get .041" minus a tiny bit for radii, plus tolerance on the hole size.

Edit: Corrected the goofy notation which I did when I was in an airport terminal and they had already begun the boarding for my flight.