"Improved" 6502

[ElEctric_EyE]

There's 2 captures of the broken link, but neither mention the 65CX8, only the 65CX1 which doesn't have multiply.
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[Bregalad]

Quote:

I still stand by multiply as a small and easy addition which gives a big performance win where applicable, but I completely agree that spooling out ideas for improvements is enormously easier than implementing them

Oh I think I'm perfectly falling into this category...
The problem is that having a ton of cool ideas for various EE/CS related projects is nice but having time to implement them it's different...

[BigEd]

This my commit where I added multiply - foolishly, I added long-distance shift at the same time, and I think the end result doesn't quite work. But I think it shows that there's not too much to do.
https://github.com/BigEd/verilog-6502/c ... 4b9a43b86a

[Alienthe]

BigEd wrote:

Same for page 1, I think. Not quite such a boost, but I think it would help.

Actually, a local memory with dual byte access for page 1 would be a major improvement for one of the strengths of 6502: interrupt response time. Currently an interrupt would cost you the time to store 3 bytes on stack before a jump through the vector. With local memory that is reduced to zero.

Return from interrupt still costs you the retrieval of the same 3 bytes. Local memory can reduce that to perhaps a single cycle.

Same for JSR and RTS you can save a lot of cycles. PHA and PLA would also save a bit.

I think this is quite a big win at the modest cost of local memory and probably not that much added logic. Best of all it should be rather transparent to the programmer. The dual port local memory could perhaps be used both for ZP and page 1.

[Bregalad]

In fact interrupts are one of the hardest thing to get right when developing a processor... or at least I feel that it's the case. Especially if a pipeline is present and you want to cancel some of the instruction that started to be executed.

[Arlet]

Typically you would finish the current instruction before starting to handle the interrupt.

[Tor]

Arlet wrote:

Typically you would finish the current instruction before starting to handle the interrupt.

But what if the CPU, or even an MMU, implements a feature where a page fault creates an interrupt? Then you need to restart the instruction.. all memory access instructions should be implemented so that they can restart I imagine. AFAIK that was almost true for all such instructions in the MC68000, except a few. Those few prevented proper memory management to be implemented, until the situation was corrected with the 68010.

-Tor

[GARTHWILSON]

That's what the 65816's ABORT\ interrupt is for.